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TPSM82864A: Question on Discharge

Part Number: TPSM82864A

Hello,

the TPSM82864A/6A data sheet states: The output discharge is active when the EN pin is set to a logic low and during thermal shutdown. The discharge is active down to an input voltage of 1.6 V (typical).

What happens regarding discharge, when the device gets disabled via UVLO (VCC in range 1.8V ... 2.1/2.3V) rather than via EN. Depending on the VCC down-ramp rate, will discharge be active during UVLO state (even with EN high level)?

Thanks

  • Hi, 

    I believe the discharge is active in UVLO.  I should be able to confirm this and reply back tomorrow.

    Thanks,

    Chris

  • Hello,

    The discharge is active in UVLO.  See the attached waveform with Vin removed and EN tied to Vin and no load.  Green is Vin and blue is Vout.  Vout begins to drop, from the discharge, at a Vin of 2.2V (UVLO).

    Let me know if you have other questions when using this device.

    Chris

  • Hi Chris,

    thanks for testing.I THINK this resolves my issue. I have no doubt that there is an UVLO controlled turn-off (be it with or without discharge). Because of the observed downramp time without load (typical times from measurements with other switchers without discharge are in the range of approx. 40ms or so I think), I assume that this really is "with discharge". However, EN controlled figure 9-27 in the datasheet seems to show an even faster downramp (approx. 600us instead of 2ms).

    Thanks

  • Yes, exactly.  Without discharge or a load, the output voltage is brought down only by leakages.  The discharge resistance is much lower than any leakages, so this leads to a much faster discharge time.

    The difference between this test and figure 9-27 is Vin.  Here, Vin is decreasing and in the figure, it is constant (at 5V).  From Figure 7-3, we see that the discharge resistance increases with decreasing Vin, so we get a slower discharge time with lower Vins.

    Chris