LM5050-2 CSD19538Q2: Ideal Diode power consumption

Lesheng Cao

Part Number: CSD19538Q2
Other Parts Discussed in Thread: LM5050-2

Hi,

I used two N-MOSFET on my power board, one N-MOSFET works as an ideal diode( I used a LM5050-2 to work with N-MOSFET), one N-MOSFET works as a load switcher. but I have concern of how much current can go through the MOSFET without damaging the N-MOSFET, so I did a simple testing: I connected a E-LOAD to Drain pin of the N-MOSFET (ideal diode) to draw current from 1A-10A, then tested the temperature of the N-MOSFET to check if there is a hot issue happened, I found the MOSFET did't heat at all even at 10A current load, I don't understand why it is not hot at all.

My question is how I should to do calculation of the power consumption of the MOSFET?

1:I measured the voltage difference between the SOURCE and DRAIN with a digital multimeter, the voltage difference is very smaller, it is about 0.1V, assume the voltage difference is 0.1V,current is 10A:

P=0.1V*10A=1W ?

2:P=I*I*Rds(on)=10A*10A*0.058ohm=5.8W ?

When N-MOSFET works as an ideal diode, the current flows from SOURCE to DRAIN, is the Resistance between SOURCE and DRAIN is the same as Rds(on) at the situation when the current flow from DRAIN to SOURCE?

Thanks

Kelvin

over 2 years ago

0 John Wallace1 over 2 years ago

TI__Mastermind 39300 points

Hello Kelvin,

Thanks for your interest in TI FETs. With 10A of drain current, the FET should get very hot and the voltage drop across the device should be >> 0.1V (10A x 58mΩ = 0.58V). The voltage drop should actually be somewhat higher because on resistance increases with temperature due to self-heating. As long as VGS ≥ 6V (i.e. FET is on), current will flow either direction from drain-to-source or source-to-drain. Furthermore, when the FET is off, current will flow from source-to-drain if the source voltage is higher than the drain voltage by about 1V which will forward bias the body diode. I think there may be an issue with the test setup. What voltage are you applying at the input (MOSFET source) of the ideal diode circuit? Is the voltage high enough to properly bias the input to the electronic load? Some E-LOADs have a limitation on how low the voltage can go. Is there another path for current to flow other than the FET? Is there a short between input and output or has the FET failed in a shorted condition between drain and source? The power dissipated in the FET can be calculated either using V x I or I² x R. I would recommend gradually increasing the current to avoid causing the FET to fail due to thermal runaway. The 2x2mm SON package can dissipate ~2.2W maximum on a good multilayer PCB design. Let me know what else I can do to help you resolve this issue.

Best Regards,

John Wallace

TI FET Applications

0 John Wallace1 over 2 years ago in reply to John Wallace1

TI__Mastermind 39300 points

Hello Kelvin,

Following up to see if your issue has been resolved. Please let me know if I can be of any further assistance.

Best Regards,

John

0 Lesheng Cao over 2 years ago in reply to John Wallace1

Prodigy 110 points

Hi John,

Thanks for your detail explanation, I just come back to work from 1/May labor holiday.

During testing, I tested the Source and Drain Voltage, the voltage difference is very small, they are almost the same voltage level, I also tested the Gate Voltage, the gate voltage is about 4V higher than Source voltage, the Source Input voltage level is about 48V.

I also compared the power dissipation of the MOSFET under two different testing setup:

Setup 1: I disable the LM5050-2 function, let the current goes through the MOSFET BODY DIODE, then goes to E-LOAD, the MOSFET is hot.

Setup 2, Enable the LM5050-2 ideal diode mode, let the current flows through the Source to Drain, then goes to E-LOAD, the mosfet is not hot at all.

Yes, maybe there is other current path in my testing setup, I will check the testing setup and will you let you know if any updating.

below is the circuits for your reference:

The voltage input at connector P_48VIN, E-LOAD draws current from connector P_48VOUT

Thanks

0 Lesheng Cao over 2 years ago in reply to Lesheng Cao

Prodigy 110 points

I tested the GATE voltage of the MOSFET, the voltage will rise up a little bit if I adjust the E-LOAD to draw more current. the GATE voltage varies from 48V to 48.8V at the load current range of 3A-6A, the input voltage is 44V, but the voltage difference between the SOURCE AND Drain is very small, the difference is nearly ZERO.

I don't find there is other current path on the board, the circuit is simple as pasted.

Thanks

0 Lesheng Cao over 2 years ago in reply to Lesheng Cao

Prodigy 110 points

would you forward my question to people who support to answer question related to LM5050-2?

Thanks

0 John Wallace1 over 2 years ago in reply to Lesheng Cao

TI__Mastermind 39300 points

Hello Lesheng,

Thanks again for your interest in TI FETs. It appears that there is not enough gate drive voltage to turn on the FET properly. The minimum VGS is 6V to ensure that the FET is on. Please refer to the Rds(on) vs. VGS curve on page 1 of the datasheet. At VGS = 4V, the on resistance rises exponentially. The LM5050-2 datasheet indicates that it should provide VGS = 11V typical. Even so, there should still be current flowing thru the body diode of the FET when it is not fully on. I don't believe there is anything wrong with the FET. I am going to forward this to the applications team responsible for the LM5050-2 to get their assistance.

Best Regards,

John