Hi Power Group.
Looking at datasheet Figure 22 - Power-Up Sequence. What sets the time interval between T1 and T2?
Also what triggers the end of T2 (In-rush Limiting)?
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Timer capacitor CTIMER sets the insertion delay T1 using equation 13 in the data sheet.
T2 interval depends on power limit setting, output capacitance and load. T2 interval ends when the VDS across hot-swap MOSFET falls below 1.25 V.
There is an interval of time between T1 and T2 where the load current is rising. What determines the start of T2 (in-rush) limiting?
During the interval between T1 and T2, CTIMER voltage is flat (no ramp). What happens if there is no inrush? Does it just enter normal operation?
My application has presented some unexpected behavior. My load contains its own input control circuity and its in-rush is delayed by a few milliseconds.
The output voltage rises to 28V without any inrush. PGD signal goes high as Vds falls below 1.25V. Then my load begins its in-rush and the LM5059 triggers as detecting a short circuit. We solved the issue by adding 20uF output capacitance to show some inrush in sync with Vout rising. This seems to keep the LM5059 in power-limit mode. I can send scope shots.
Without adding output capacitance my circuit detects the load inrush as a short circuit event and fails to startup. The load is a series of LED lights used for cabin lighting. The lights fail to turn on.
The issue is resolved by adding 20uF capacitance to the output. I do not fully understand why adding the output capacitance resolved the problem and also what mode the LM5069 is operating in during startup. By adding the output caps is the controller in in-rush mode or Power Limit mode.
Please see attached scope shots.
StuartLM5069 Data for TI.pdf
It is the expected behavior. When you turn-on a load on an established VOUT, there will be inrush current. If the magnitude of inrush current exceeds the circuit breaker threshold of LM5069, the device turns-off the external MOSFET.
If you add COUT, it sources the inrush current and avoids the unwanted circuit trips