Other Parts Discussed in Thread: TPS566235,
Hello,
I need to power a 4G modem (3.8V, up to 3A peak) with following constraints : maximum efficiency in sleep mode (current between 1 and 10mA), and OOA frequency mode in all output current range.
Vin between 11 and 15V.
I've made tests with TPS564255 and TPS566235 eval boards. On each one, I've modified the feedback resistor value to get 3.8-3.9V, added a 33pF feedback capacitor, and modified the inductor for a 3.3µH model (also tried 4.7µH for the TPS564255). No additionnal cap on the output.
The output of the TPS564255 presents a high ripple between 20 and 200mA, with some points where it reaches up to 150mVpp (especially at 80mA output, 66kHz) ! Below and above these currents, the ripple is normal (<20mVpp). I tried with two additionnal 22µF caps on the outputs, and removing Cff or setting Cff=100pF, no changes, except the ripple is just a little bit lower with high output cap (130mVpp).
The output of the TPS566235 also have a ripple augmentation between 10 and 150mA but stays reasonnable for me (60mVpp at 50mA). However I don't know if this ripple could be higher on another chip, I can't conclude on a single chip evaluation without understanding what's going on.
The load step transcient measurements present better results on TPS564255 than on TPS564255 (for Cff=33pF on both EVM, but Rbottom differs between the two boards).
This is clearly not valid for my project...how do you explain such behavior ? What components values should I use to avoid that ?
Thank you
Aurelien