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LMR36015: Layout feedback

Part Number: LMR36015

Hi,

I have my design with LMR36015 quite advanced and I would like to have a feedback from TI.

Attached you will find a  document with a description of the stack, sch, and layers.

There is a point, pin12 - SW node, where I would like to know your opinion. 

Best regards,

david4505.LMR36015_LAYOUT.pdf

  • Hello

    We will review and provide feedback by EOB on Fri 6/23/2023 PDT.

    Thanks

  • Hi Frank,

    Thanks for the confirmation.

    Regards,

    david

  • Hello

    1. In general, try to avoid the use of thermal reliefs. Use direct connections
    to power pins, components, and planes. This includes VIN, SW, GND, Cin, Cout, Cvcc, Cboot, and L. Thermal reliefs will add unnecessary inductance that can cause unexpected device behavior. At the very least increase the tab width of the thermal reliefs to lower the connection inductance.

    2. More ground vias near and around the input capacitors will be helpful both to
    reduce the ground inductance and with thermal performance.

    3. Perhaps the VIN pour on the top could be a little smaller. Then you would have
    more top ground to help with thermals. You would add more ground vias in that area.

    4. A few more ground vias around the output capacitors may also be helpful with thermals.

    Thanks