LM5149-Q1: can't rise to 24V with load.

sorry the second figure shall be:

the successful  power on process, you can see the output can rise to 24V. (with no load)

Hi Lina,

You need logic level FETs, These FETs usually have specs for VGS = 4.5V.

That high-side MOSFET, BSC070N10NS5, is not logic level.

See BSC070N10LS5, it's a logic-level equivalent.

You also need a logic FET for the low-side.

Unfortunately I cant seem to find a 100V one in the same footprint.

You may be able to increase the VCCX voltage to ~6V and test with your existing FETs.

Be careful to not exceed VCC absmax of 6.5V.

However the default VCC voltage is 5V, and it's recommend to use logic level FETs.

Hope this helps,

-Orlando

I have changed the MOSFET to a logic MOSFET before I do this test. thanks for reminding. actually i have noticed it.

after the test, I changed to a new chip. then the circuit works. so the chip is damaged.

however, when I run another board which has this circuit. the circuits fails again.

I noticed that the EN threshold is too low, then at the power process, it has a period MOSFET don't switch.

I rise the threshold, does it matter? I do the test right now.

I still don't know why this chip is damaged?

and I find that VDDA drop below to 4.0V, I think it is not right.

I have another finding: VDDA only has 40 ohm to ground after it is powered on. 

and VDDA drops to 3.9V when it is powered on.

Hi Lina,

VDDA is derived from VCC.

Is VCC only 3.9V? 

Are you certain the 5V VCCX does not exceed VIN?

The 5V VCCX must always shutdown before VIN, to prevent reverse current from damaging the device.

Otherwise you will need a diode from to VIN of the IC, to prevent reverse current.

Also, if using AEF, the 5V VCCX must not exceed 5.5V. 

Hope this helps, 

-Orlando

VCC is 4.8V, but it is not normal,as I can see cycle voltage drops on 5V normal voltage.

I also remove the VCCX, the chip quickly be broken when VIN powers on. it’s very hot.

then I add a diode on from to VIN pin of the chip as you suggest, and let VCCX 5V on first, the chip is not broken, when I power on VIN,the same result as before: chip broken, hot,VDDX 40ohm to Ground.

i remove the two MOSFET, the chip is not broken when i powers on VIN.

when i change MOSFET to a lower Qg (charge ）MOSFET, therefore low power desired on VCC，the chip still broken.

when I change PFM pin to VDDA, change the mode, the chips is not broken, but however the VOUT voltage can’t rise to 24V, only ~10V, and then the diode on VIN pin is broken after a period 

Hi Lina,

Is your Exposed pad connected to GND pour copper? You need that to pull heat from the IC.

PFM mode (PFM to VDDA) should work with no diode or no VCCX. 

Also the diode on VIN should not break.

Can you capture the startup waveform in PFM mode?

VIN, VOUT, VCC, SW waveforms

What is the part number or ESR of electrolytic capacitor C454?

Let me know,

-Orlando

thanks for the answer.

Exposed pad is connected to GND pour copper. 

C454 part number is EEVFK2A680Q.

Can I just connect CNFG to GND? from the datasheet, it shall have a resistor to configure during the start-up. but the evaluating board, I connect CNFG to GND to disable AEF, it also works fine.

Hi Lina,

Yes you can tie CNFG to GND for single-phase, AEF disabled, spread-spectrum disabled.

Is this working with AEF disabled?

-Orlando

on one board, AEF disable helps to be correctly output with load more than 1A.

when without AEF disable (CNFG 41.2K to GND), the load can only up tp 1A. when load more than 1A, the chip burns.

but however, when we try another board. the chip can't work at all. chip burns immediately. just as the beginning we set CNFG to GND.

I Check the 5V(output 5.02V) where VCCX connected, the voltage ripple is only 200mV peak to peak at steady output. only 100mV peak to peak voltage ripple with 1A load transient.

VIN, VOUT, VCC, SW waveforms is as below;

C1: EN

C2: Low side Vds (SW)

C3: VIN

C4: VOUT

Hi Lina,

Soft-start is ~3ms, it should rise from 0V to 24V in that 3ms in a linear slope.

The stair step waveform of start up is not expected.

You dont have the VCC of the LM5149. Is the LM5148 VCC voltage constantly 5V?

Also, the VIN voltage should not reduce. Is your power supply current limited?

Also please double check your compensation design with the quickstart calculator.

https://www.ti.com/tool/LM5149-LM25149DESIGN-CALC 

Please fill out and attach this here so I can also check.

The RCOMP of 75kΩ is oversized. I think it should be much lower.

-Orlando

I changed the R and C values to the ones recommend by the quickstart calculator. I still got the chip burning result.

the calculator is as this.

LM5149 Quickstart Calculator_rev1_BSZ070N08LS5.xlsm

the power on figure after the burned is just as below.

Vin is the tested on the spot after AFE filter (TP409) , the pin of Vin of LM5149. we had set the current limit on power supply, but however it seems not trigger the limit.

on VCC you can see some glitches due to the open and close of MOSFET. the highest would be 5.7 as we noticed but unfortunately the figure not saved.

currently the CNFG is connected to GND. so AEF is not disable. so the VCC can exceed 5.5V.

We don't use external VCC in this time.

the schematic is below.

Hi Lina,

Even if AEF is disabled, the VCC cannot exceed 5.5V.  I suggest removing AEFVDDA capacitor and resistor to VCC until you figure out the DC/DC portion.

VCC ripple should not be that large. Is the VCC capacitor close to the VCC and PGND pins?

Also please reattach your schematic, the image is low-resolution on E2E.

-Orlando

2437.schematic.docx

put the schematic in the word.

VCC capacitor is a little bit far away from VCC pin.

this capacitor is put on the other side of the chip.

Lina,

That VCC cap placement is definitely not optimal. That is likely why the VCC ripple is so large.

Please place it closer to IC. 

Your HO, LO and SW trace thickness should be thicker, like 20mils.

Also HO and SW traces need to be routed close together to the FET. 

When you used external VCCX, did you measure the current going into VCCX? Or are you able to measure current going into VIN pin of IC? A series 1Ω resistor can help with that.

-Orlando

hello Orlando,

this is the last minute where the chip burns. 

C1: Vin voltage

C2: Low-side MOSFET VDS

C3: Inductor current

C4: VDDA voltage

We use external voltage to supply VCC. you can see VDDA drops to ~3V at this time spot as we set current limit on VCCX power supply.

Inductor current is quite small at this moment. 

We already put a capacitor close to VIN pin and PGND.

We use one ground plane for AGND and PGND. 

Hi Lina,

Understood, however the VCC capacitor placement is also very important.

It is possible for VDDA to fall to 3.3V, at light-load in PFM, however VCC should always be 5V.

This is detailed in section 8.3.2 of the datasheet.

What doesn't make sense is the SW node (Low-side FET VDS) ramping down linearly to 20V, and then staying at 20V indefinitely.

The SW node should either be VIN or GND depending on which FET is ON.

If both FETs are off then SW should be ringing around the VOUT voltage, not linear slope down unless VOUT is sloping down.

However to stay flat at 20V is very strange.

Also it looks like the VOUT voltage is too high right at the moment when VDDA drops to ~3.3V.

-Orlando