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UCC28730-Q1: Query

Part Number: UCC28730-Q1
Other Parts Discussed in Thread: UCC28730, PMP22557

We are evaluating UCC28730QDRQ1 power converter as a non Isolated buck converter as per TI design note(Design note link provided as below).  So considering this application we need information on a couple of points.

  1. Transient response of buck convertor
  2. How long does the buck converter provide power for VDD from the HV pin during start up?
  3. What will be the maximum operating frequency of this converter?
  4. What will happen if a used power MOSFET has high input capacitance which leads to high gate average current(Required gate current more than maximum sourcing capacity of HV pin during start up)?
  5. Power supply rejection ratio of  convertor in this application
  6. Detailed calculation for this design

  • Hi Prahlad,

    Thank you for the query on UCC28730.

    1. The transient response details are mentioned in the test report in Section 3.4. The response is underdamped and can be seen in the report below for 50% load step.

    2. An internal high-voltage startup switch, connected to the bulk capacitor voltage (VBULK) through the HV pin, charges the VDD capacitor. This startup switch functions similarly to a current source providing typically 250 µA (500uA max) to charge the VDD capacitor. When VVDD reaches the 21-V UVLO turn-on threshold, the controller is enabled, the converter starts switching, and the startup switch turns off. The time to reach output regulation consists of the time the VDD capacitor charges to VVDD(on) plus the time the output capacitor charges. Refer section of datasheet also

    3. 83khz

    4. The buck converter operates in DCM mode and does not require large drive current. The power level is only 4.8W and typically does not require high power MOSFETs for this. Hence capacitance associated is also less. So this is not a cause for concern.

    5. We do not have this information in test report. Please contact PDS team if they have any info to share.

    6. Please see calculations below:


    Design Formula


    Input voltage (min)



    Input voltage (max)



    Output Voltage



    Output current



    Sense resistor

    Rcs = Nps x Vccr / (2 x Iocc)
    Nps = 1
    choose value close to 90% of max value








    Lp = (2 x (Vocv + Vf +Vcbc) x Iocc)/(Ipp_max x Ipp_max x Fsw)
    Fsw is around 42khz from the test results




    Brown in voltage (Run voltage)

    Rs1 = Voltage(start)/225uA; Voltage start =40V (R1+R8+R9)




    Constant voltage regulation target

    Rs2  = R1 x Vvsr / (Vocv + Vf) – Vvsr





    Rlc = Klc x Rs1 x Rcs x td/Lp