When I use TLV803EB33VDBZR to give the first supervisor enable signal, It seems the delay time is 120~130us. But it should be 40us.
So I guess there is a startup time of TLV803E. But it is not in the datasheet.
Would you please confirm this?
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When I use TLV803EB33VDBZR to give the first supervisor enable signal, It seems the delay time is 120~130us. But it should be 40us.
So I guess there is a startup time of TLV803E. But it is not in the datasheet.
Would you please confirm this?
Hello,
Please make sure you are measuring the time from when input crosses the threshold voltage and not from application of power. Please refer to figure 7-2. Thanks.
Hello Masoud
In figure 7-1, the first delay is not measured.
From the figure we measured, it is roughly 90us.

Hello
After the 1st power up, the rest delay of the reset signal is rougly 40us.
Can you confirm the delay of 1st power on is longer than 40us?
Thanks!
Hello,
The first cycle many be slightly longer due to internal power on circuitry. We do not spec this separately.
Thanks.
The startup delay of TLV803EB is key charadteristics for our application. Could you please specify it? The following measurment is for TLV803EB33xx chip. The first cycle is around 160us. Our requirement for this is between 100us and 200us. Whether the TLV803EB can commit it or not?

Hello,
As mentioned in the last post, we do not specify a start up time for this device. Thank you.
Thanks for your answer! Based on our application requirement (100~200us over whole tempearture -40~125C, and whole life time, step response), could you please hlep to judge whether TLV803EB can meet our application or not? Or you can prpose how to do this judgement through some test?
Thanks a lot~
Hello,
You can characterize the start up time by testing multiple devices over the temperature range. Hope that helps. Thanks.
How many pieces devices can let us make conclusion whether startup delay can meet our requirement or not? In Ti side, can you do some simulation to tell us the startup delay range?
Is it possible to give us startup delay based on simulation in TI side? Thanks a lot~