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Original question:

TPSM846C24: TPSM846C24 is QFM (MOL)

TPSM846C24: Vias on Footprint questions and AGND/PGND connection

BX27
Genius 3890 points
Part Number: TPSM846C24

Hi there, We use TPSM846C24  to convert 5V to 0.95V, 25A.

Some question to consult. Thanks !

1. Could you help provide TPSM846C24 footprint files , we use allegro 16.6. The download file from product page seem not usable.

2. There are many vias resident right on the pin pads(as I marked out in blue rectangle ) ,I understand this is for thermal and current density, but from SMT process perspective, we generally DO NOT do this "vias in pad". How do you think?

3. There are also dashed-line vias (as I marked with red cycle), some of these via are rather close to pin pad, we tend to remove them to avoid possible short. How do you think?

4. I assume the locations of all those vias are recommending, we can adjust them .

5. AGND and PGND are internally connected. How should we connect them on PCB board?  Our PCB has >10 layers, we plan to use a small area of copper as AGND under the IC, and connect it to larger PGND layers with single point connection (maybe through a 0 ohm resistor). How do you think?

  • +1
    TI__Genius 11315 points

    Hello Yi,

    1. https://vendor.ultralibrarian.com/TI/embedded/?gpn=TPSM846C24&package=MOL&pin=59&sid=01845930a9d1000b001c50d005f90506f007f06700bd0&c=1 This link should take you to a page where you can download different versions of the package. I do see an option for Allegro 16.x.

     

    Let me know if there is still an issue with this and I can forward it to the modeling team.

    2. Yes, this is just a recommendation. This helps with current flow through power planes below the top layer and with thermal dissipation. Via usage is up to the designer's discretion, but TI suggests you follow our recommendations on the datasheet.

    3. You can move the vias as you see fit for your design. The vias we recommend are not a hard design requirement.

    4. Yes you can adjust the location of the Vias based on the needs of the design.

    5. Since there is already an internal connection between PGND and AGND, there is no need to connect them externally on the PCB. If this is a requirement on your part, then a small connection point is best practice, such as a net tie using a 0 Ohm resistor as you stated.

    Thanks,
    Caleb

  • +1 in reply to Caleb Perez
    Genius 3890 points

    Hi Caleb, I run the downloaded .bat files and got this error , and the process of generating package file is unsuccessful. could you help ? thanks!


    PADSTACK ERRORS and WARNINGS:

    Drill hole size is equal or larger than smallest pad size.
    Pad will be drilled away.

  • +1 in reply to BX27
    TI__Genius 11315 points

    Hey Yi,

    Unfortunately I am unfamiliar with this software and this error. Let me ask my colleagues and I will get back to you by next week with an answer.

    Thanks,
    Caleb