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TPS3820: disable the WDT when read/write

Ryoma Ohashi
Expert 3370 points
Part Number: TPS3820
Other Parts Discussed in Thread: TPS3823, TPS3828, , TPS3824

Hi team, 

My customer wants to disable the WDT and set /RESET to high when read/write event at MCU.

In the datasheet, it says that /RESET will be LOW for td when there is no input in the WDI for Ttout. But my customer wants to disable this feature only at particular event.

I guess this can be achieved by below feature:

"The watchdog timer can be disabled by disconnecting the WDI pin from the system. If the WDI pin detects that it is in a high-impedance state, the TPS3820, TPS3823, TPS3824, or TPS3828 will generate its own WDI pulse to ensure that RESET does not assert."

Could you show us the recommended schematic/configuration for disabling the WDT. Shoud the customer use FET at the WDI and control it by the GPIO from MCU?

Regards,

Ohashi

  • Former Member
    +1 Former Member

    Hi Ohashi,

    Thank you for your question!

    Adding a FET at the WDI pin, controlled by a GPIO pin from the MCU, will implement the feature you are looking for. Below is a sample circuit:

    In this example, a NMOS device is controlled by a separate GPIO pin from the MCU. When the bottom I/O pin is high, the NMOS will turn on and connect the top I/O pin with WDI. However, when the bottom I/O is low, the NMOS will turn off and disconnect the two when performing a read/write event. The same functionality can be performed with a PMOS device with reversed high/low states for the bottom I/O pin. One important note is to choose a FET that has a high off impedance between the source and drain.

    I hope this helps!

    Best Regards,

    Andrew Li