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TLC5943 Icc variation

Nick Dolling
Prodigy 70 points
Other Parts Discussed in Thread: TLC5943

Hi,

I'm using a TLC5943 to drive 5 x RGB LEDs in a new design (so it uses 15 of the 16 channels). 

The peak current is set to 5mA/LED, and each channel only has a single LED attached, so the LED supply is 5V.

GSCLK is 1MHz.

The chip supply is 3.3V, and I'm trying to understand the datasheet specs on Icc so I can verify my power budget. 

From the datasheet, it appears that Icc

a) depends on the peak LED current programmed by I(Rref) 

b) depends on the frequency of GSCLK. 

c) the dependency on GSCLK is also affected by the programmed Iref

The power budget is tight, and based on the numbers in the datasheet I had budgeted for about 10mA Icc when running at 10MHz GSCLK and 10mA per LED.

Obviously I'm not running it at this point any more, but the actual measured Icc is significantly lower (~1mA), and also doesn't seem to vary much as I change GSCLK from 100kHz - 5MHz.

Can someone explain :

- how Icc should vary with the LED reference current (and why)

- how Icc should vary GSCLK (and why)

- why Icc at a given GSCLK frequency also depends on Iref

Thanks.

Nick

  • 0
    TI__Guru 61115 points

    Hello Nick,

    Let me try to answer your questions:

    - how Icc should vary with the LED reference current (and why)

    Iiref = Vref / Riref = Iolc_max/41. The current through the resistor connected to IREF defines the maximum output current. The curent through Riref is 1/41 of the output current and the voltage through this resistor has to be delivered from VCC of the IC. The lower Riref, the higher is Icc due to this resistor.

    - how Icc should vary GSCLK (and why)

    ICC1 and ICC2 have the outputs disabled. ICC3 and ICC4 have the outputs enabled. This is the biggest difference between the different currents. The input current variation with GSCLK frequency variation is maybe not really significant but this is one of the test conditions that have to be defined to run the test. The bigger variation is coming from enabling the outputs and hence the output drivers. So the increased current in ICC3 is dominated by the output stages and drivers, but there will be some influence due to the data input speed due to the data line drivers.

    - why Icc at a given GSCLK frequency also depends on Iref.

    I think you are comparing ICC3 and ICC4 and here the output stages are able to drive higher currents with reduced Riref and therefore the current needed to turn on and off the output stages will be increased.

    Best regards,
    Brigitte

  • 0 in reply to Brigitte
    Prodigy 70 points

    Hi Brigitte,

    Thanks for the reply.

    The dependency of Icc on the load on the Iref pin makes sense... I was wondering more what the relationship was.

    Regarding the dependency (or lack thereof) of Icc on GSCLK... I had missed that there was also the difference that the outputs were enabled (pretty obvious when you think about it).

    Can you explain a bit more about the relationship then between Icc and the programmed output current?

    It would be nice to be able to interpolate to get an expected Icc running at other programmed currents, as well as how many outputs are actually active.

    For example in my application I need to limit the average current per channel to about 1mA. I can achieve this by setting the output current to 10mA and limiting the duty cycle to 10%, or I can achieve the same thing by setting the output current to 5mA an limiting duty cycle to 20%.. it would be nice to know if one of these would result in lower Icc.

    Also, as I'm only using 15 of the 16 channels... it would be nice to know if this makes a difference.

    I realise I could deduce a lot of this from experimentation, but it's a lot safer from a design perspective if someone can explain why rather the relying on assumption :)

    Cheers.

    Nick

  • 0 in reply to Nick Dolling
    TI__Guru 61115 points

    Hello Nick,

    The only save way to know exactly the input current in your application is to measure it.

    The input current will be somehow dependent on the amount of turned on outputs, because each output transistor has to be driven and controlled.

    The input current will increase with reduced Riref and with increased output current and with increased amount of turned on output channels, so to measure the worst case input current, you should use the smallest Riref you plan to use, then turn the maximum amount of output channels on, you plan to turn on at the same time and program the highest current you plan to use. This should give you the worst input current in your application.

    Then I would multiply this value by a factor of 1.5 or 2 to make sure that I really have enough margin for parts that are not nominal in their behavior.

    Best regards,
    Brigitte