Hi Team,
We have designed TPS62745 chip as per data sheet , all VSEL1 to 4 lines connected to VOUT Line. When I used TI ‘WEBENCH design tool‘ found all VSEL 1to 4 lines connected to VIN. PG is open in datasheet application ckt , WEBENCH tool it is connected to pullup resistor . Please confirm which configuration is correct?
As per Datasheet
WEBENCH ® Design Report
Regards,
Rajani