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TLV1117: Thermal Calculations

Whitham Reeve
Prodigy 140 points
Part Number: TLV1117

The datasheet provides thermal metrics but there is no guidance on how to use them for this particular device. It references the TI Semiconductor and IC Package Thermal Metrics, which is primarily concerned with measurements. I though I knew how to do the thermal calculations but I need some helpful guidance for this one.

How do I determine if my design will work? I know that the thermal performance depends on the PCB but I'm looking at a 4-layer design with 2S2P layers where there are many small vias that connect the layers around the device. Assume the PCB is a standard 2S2P setup.

In my application, the input voltage is 8.8 V and the output is 3.3 V. The load current is 200 mA. Will this device work where the ambient temperature is 85 deg. C? If not, what is the maximum temperature?

Any advice would be appreciated.

Whit

  • 0
    TI__Genius 13245 points

    Hey Whit, 

    Yes, thermal dissipation can seem like a complex topic but I'll try to simplify it here and provide some additional resources if you wan to review them.

    The maximum power dissipation (Pd) will depend on the your ambient temperature (Ta) and the thermal dissipation of their PCB layout (Rja), such that the LDO junction temperature (Tj) stays within the rated operating junction temperature which is 125C for TLV1117. The equation to calculate the max power dissipation is  Pd=(Tj-Ta)/Rja, for initial calculations it can be assumed that Rja is the same as the JEDEC High-K thermal dissipation (2S2P) listed in the datasheet (this is package dependent). 

    Once you've calculated the maximum power dissipation for your package you can then compare it to the max power you expect to dissipate in your application. 

    Other useful resources

    Our LDO Basics e-book covers thermal dissipation at a high level (pages 8-10)

    We also have an App Note which shows how the thermal dissipation (Rja) can be affected by board layout and it shows that with an optimized PCB layout the θja listed in our datasheets can be reduced by 35%-55%.https://www.ti.com/lit/an/slvae85/slvae85.pdf

     I hope that helps, let me know if you have any other questions. 

  • 0 in reply to Kyle Van Renterghem
    Prodigy 140 points

    Thanks, Kyle - Looking at the TLV1117 datasheet, specifically, the SOT-223 version (DCY package), is the correct Rja to use 104.3 C/W? The Note 3 appears to say that but I am just making sure.

    Assuming Rja is 104.3 C/W and T = 125C, Ta=85C, the max power dissipation is .383 W. If I change to the KVU package, then Pdmax = 0.786 W. Am I doing this right?

    Thanks again!

    Whit

  • +1 in reply to Whitham Reeve
    TI__Genius 13245 points

    Hey Wit, yeah your calculations are correct.