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UCC28180: OVP function test

Part Number: UCC28180


Hi,

My customer would like to verify the UCC28180 output OVP function.

From the datasheet,I know the Vsense pin over 107% of reference  will trigger the function.

According my design,resistance Vsense_upper is 1.037M and Vsense_lower is 13.7k,so the OVP point should be about 418V.

But how do I test this function?

If I use the variable resistor as Vsense_lower to change output for above OVP point,the feedback resistor ratio into Vsense also changed for keeping Vsense at reference voltage.

Does anyone verify the OVP function before and how to test it?

  • Hi Wendler,

    Thank you for the query on UCC28180.

    I think you can change as per the potentiometer concept mentioned. While at proper operation Vsense should be 5V and on adjustement of lower Rsense resistor, OVP will be activated at 1.07*5 = 5.35V, So this way OVP can be checked.

    Please let us know if you have any questions.

    Regards,

  • I think you don't get my point.
    When I change the lower resistor,the output should also change.So the Vsense still keep at 5V.
    In other words,in my original design the output should be about 383V when Rsense upper resistor 1.037M ohm and lower resistor 13.7k ohm.
    At this resistor  value the OVP should be 418V for the Vsense to reach 5.35V to trigger ic OVP function.

    But how can I change the output from 383V to 418V when the resistor is fixed.
    Because when you change the Vsense resistor,it also change the output to keep the Vsense at 5V

  • Hello Wendler, 

    You are correct that OVP cannot be tested simply by changing the VSENSE resistor-divider ratio.  

    If you are looking to do this for a test-bench evaluation, then there are a couple of options you can implement. 

    1.  Since the voltage-loop BW is < 10Hz, the response time of the loop is slow and VCOMP will not change significantly over 10~20msec.  You can attach a test-resistor from VSENSE to a step voltage source through a blocking diode.  After reaching normal steady-state operation, step or quickly ramp up the external voltage source to 6V and capture the OVP shutdown on an oscilloscope.  I suggest a probe on GATE and one on VSENSE.  Trigger on the rising edge of the 6V and capture the rise of VSENSE and the point where GATE output stops.  A finite slope on the 6V can help resolve the OV threshold point on VSENSE.

    2.  Reduce the PFC output capacitance by 1/2 and run the PFC at full load.  The peak-to-peak output ripple voltage should be 2X what it normally is. 
    I believe that an un-load step will result in a Vout transient overshoot higher than the OVP threshold.  Suddenly remove the load and capture the point where GATE switching stops.   You can first try the sudden un-load method without reducing Cout to see if the overshoot will reach OVP, but it might not.

    I think method 1 may be a little "safer" than method 2.  

    If you need to perform repeated production testing for assembly-line PSUs, then the testing can become more tricky. 
    I suggest to incorporate a means to couple an external signal into VCOMP, such as a test-point connector.  Run the units at high-line, full-load to force VCOMP to a lower steady-state voltage.  Use a large capacitor to couple a pulse of external voltage into VCOMP for a few 10's of microseconds.  
    VCOMP should be relatively noise free, so it is a good node to inject an external signal into.   The pulse of external voltage should be synchronized with the peak of the input AC line so that excess inductor current is pumped into Cout to raise Vout rapidly.  This doesn't work if the input voltage is near the zero-crossings.  The pulse duration and the pulse amplitude should be chosen by trial and error, gradually increasing amplitude and time until you get a reliable increase of Vout to OVP without excessive and dangerous overdrive.  

    Regards,
    Ulrich

  • Hello Wendler, 

    I received notice that my reply (above) was rejected, but no reason is given for the rejection.  Can you please let me know why my answer is not satisfactory? 

    Thank you,
    Ulrich