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TPS25831-Q1: BC1.2 DCP compliance failed

Part Number: TPS25831-Q1

Hi TI experts.

We get a BC1.2 DCP compliance failed when using TPS25831-Q1.

The fail item are DCP12, 13, 15.

Here are the logs:

BC1.2_DCP_P2_CC1_1.txt
Packet-Master USB-PET Report on Product
Copyright � 2010-2015 MQP Electronics Ltd.
Scripts OTG 2.0 Rel:1.4.1.0, BC 1.2 Rel:1.2.1.7
Test run on Thursday, September 14, 2023 16:45:20
_________________________________________________

Opening script: CT_DCP_OVRSHT.mpet
Compile successful

[0.126,215] DCP Overshoot and Undershoot Voltage Test
[0.126,215]
[0.126,216] SETTINGS
[0.126,216] ---------------------------------------------------
[0.126,217] * DCP cable is not captive
[0.126,219] ---------------------------------------------------
[0.126,220]
[0.126,220]
[0.126,250] Ensure UUT connected using Special Test Cable B.
[1.549,684] If UUT power is on, switch it off, then click OK.
[9.496,767] 3.  Wait for voltage to fall below 0.5V. (Speed up fall with
                current load.)
[9.496,785]     - Voltage has fallen to 0.014V
[9.496,791] 4.  Set up voltage watch-block ready to capture overshoot of
                VCHG_OVRSHT (6.0V) on VBUS.
[9.496,803] Plug DCP into 'wall-socket', or otherwise power it up, then click
            OK.
[22.016,563]     Checking for VBUS to be on.
[22.016,569]     - Voltage has risen to 5.098V
[22.016,570] 7.  Check watch-block overshoot detector latch was not triggered.
[22.016,574]     - Overshoot did not exceed 6.0V
[22.016,577] 8.  Set up voltage watch-block ready to capture undershoot of
                 VCHG_UNDSHT (4.1V), or overshoot of VCHG_OVRSHT (6.0V) on
                 VBUS.
[22.016,600] 9.  With an applied current load of IDCP_LOW min (0mA), check
                 that VBUS average is within appropriate range VCHG (4.75V to
                 5.25V at the UUT) over the next TVBUS_AVG max (0.25 sec).
[22.270,013]     - Vbus average (no load) was 5.096V - in spec.
[22.270,014] 10. Check watch-block overshoot and undershoot detector latches
                 were not triggered.
[22.270,019]     - Overshoot did not exceed 6.0V
[22.270,025]     - Undershoot did not go below 4.1V
[22.270,028] 11. Re-program watch-block to allow for voltage drop in cable.
[22.270,051]
[22.270,052] Emulate attaching PD

[22.270,052] 12. Apply voltage source  (0.535V) via 200R resistor to D+. Apply
                 voltage source (0.15V) via 15k resistor to D-.
[22.271,081] 13. Wait TVDMSRC_EN max + 1 ms (= 21ms).
[22.292,082] 14. Check D- > VDAT_REF min (0.25V).
[22.292,088]     - D- handshake seen OK (D- is at 1.013V.)
[22.292,089] 15. Wait for 1ms more than the remainder of TVDPSRC_ON (40ms -
                 20ms = 20ms).
[22.312,090] 16. Disconnect voltage source via 200R resistor from D+.
                 Disconnect voltage source via 15k resistor from D-.
[22.313,119]
[22.313,119] Load Testing

[22.313,120] 17. Apply load of IDCP_MID max (100mA) to VBUS.
[22.313,131] 18. Wait TDCP_UNDSHT max (10ms).
[22.323,132] 19. Check VBUS, at DCP connector, is in range VCHG (4.75V to
                 5.25V), making due allowance for voltage drop in cable (spot
                 check voltage).
[22.323,133]     Actual lower limit used at PET is 4.656V.
[22.323,133]     This is because 0.054V will be dropped in the test cable at
                 100mA.
[22.323,134]     A further allowance of 0.040V is included to cover variations
                 in the connector resistance plus measurement tolerances.
[22.323,140]     - Spot check voltage was 5.072V (lies in range 4.75V to 5.25V
                 at UUT)
[22.323,142] 20. Check watch-block overshoot and undershoot detector latches
                 were not triggered.
[22.323,146]     - Overshoot did not exceed 6.0V
[22.323,153]     - Undershoot did not go below 4.1V
[22.323,156] 21. Re-program watch-block to allow for voltage drop in cable.
[22.323,179] 22. Increase load on VBUS to IDCP min (500mA), 20ms after rise to
                 IDCP mid.
[22.323,185] 23. Wait TDCP_UNDSHT max (10ms).
[22.333,186] 24. Check VBUS average, at DCP connector, is in range VCHG (4.75V
                 to 5.25V), over the next TVBUS_AVG max (0.25 sec), making due
                 allowance for voltage drop in cable.
[22.333,186]     Actual lower limit used at PET is 4.418V.
[22.333,187]     This is because 0.272V will be dropped in the test cable at
                 500mA.
[22.333,187]     A further allowance of 0.060V is included to cover variations
                 in the connector resistance plus measurement tolerances.
[22.586,986]     - Vbus average (500mA) was 4.970V - in spec.
[22.586,987] 25. Check watch-block overshoot and undershoot detector latches
                 were not triggered.
[22.586,992]     - Overshoot did not exceed 6.0V
[22.586,998]     - Undershoot did not go below 4.1V
[22.587,001] 26. Remove Current Load.
[22.587,007] 27. Wait 100 ms
[22.687,008] 28. Check watch-block overshoot and undershoot detector latches
                 were not triggered.
[22.687,012]     - Overshoot did not exceed 6.0V
[22.687,019]     - Undershoot did not go below 4.1V
[22.687,022] 29. Apply load of IDCP min (500mA) to VBUS.
[22.687,028] 30. Wait TDCP_UNDSHT max (10ms).
[22.697,029] 31. Check VBUS, at DCP connector, is in range VCHG (4.75V to
                 5.25V), making due allowance for voltage drop in cable (spot
                 check voltage).
[22.697,029]     Actual lower limit used at PET is 4.418V.
[22.697,030]     This is because 0.272V will be dropped in the test cable at
                 500mA.
[22.697,030]     A further allowance of 0.060V is included to cover variations
                 in the connector resistance plus measurement tolerances.
[22.697,037]     - Spot check voltage was 4.972V (lies in range 4.75V to 5.25V
                 at UUT)
[22.697,039] 32. Check VBUS average, at DCP connector, is in range VCHG (4.75V
                 to 5.25V), over the next TVBUS_AVG max (0.25 sec), making due
                 allowance for voltage drop in cable.
[22.697,040]     Actual lower limit used at PET is 4.418V.
[22.697,040]     This is because 0.272V will be dropped in the test cable at
                 500mA.
[22.697,041]     A further allowance of 0.060V is included to cover variations
                 in the connector resistance plus measurement tolerances.
[22.957,055]     - Vbus average (500mA) was 4.972V - in spec.
[22.957,056] 33. Remove Current Load.
[22.957,062] 34. Wait 100ms
[23.057,063] 35. Check watch-block overshoot and undershoot detector latches
                 were not triggered.
[23.057,067]     - Overshoot did not exceed 6.0V
[23.057,074]     - Undershoot did not go below 4.1V
[23.057,077]     End of Test
[23.057,089] PASSED TEST

===End of Script===============================================

Opening script: CT_DCP_HNDSHK.mpet
Compile successful

[23.201,135] DCP Handshaking Test
[23.211,176]
[23.211,176] Initial State: UUT is connected via Special Test Cable B, or its
             captive cable, to the PET. No load applied. DCP is switched on.
             Data lines switched to data measurement circuit.
[23.211,177] 1. Check VBUS is above VOTG_SESS_VLD max (4V). [DCP6]
[23.211,183]     - VBUS is at 5.098V. We may proceed.
[23.211,184] 2. Wait 200ms
[23.411,184]
[23.411,185] Primary Detection

[23.411,185] 3.  Apply voltage source  (0.535V) via 200R resistor to D+. Apply
                 voltage source (0.15V) via 15k resistor to D-.
[23.412,214] 4. Wait slightly more than TVDMSRC_EN max (20ms +1 ms = 21ms).
[23.433,215] 5.  Check D- voltage is in range VDM_SRC (0.5V - 0.7V). [DCP12,
                 DCP13]
[23.433,221]     FAIL: D- is 1.013V.
[23.433,223] 6. Wait 20ms to complete TVDPSRC_ON.
[23.453,223] 7.  Disconnect voltage source via 200R resistor from D+.
                 Disconnect voltage source via 15k resistor from D-.
[23.453,235]
[23.453,236] Secondary Detection
[23.453,236] 8.  Apply voltage source  (0.535V) via 200R resistor to D-. Apply
                 voltage source (0.15V) via 15k resistor to D+.
[23.454,265] 9. Wait 21ms.
[23.475,266] 10. Check D+ voltage is in range VDM_SRC (0.5V - 0.7V). [DCP12,
                 DCP13]
[23.475,272]     FAIL: D- is 1.004V.
[23.475,274] 11. Wait 20ms to complete TVDMSRC_ON.
[23.495,274] 12. Disconnect voltage source via 200R resistor from D-.
                 Disconnect voltage source via 15k resistor from D+.
[23.495,286] 13. Wait 5 seconds for UUT to recover.
[28.495,287]
[28.495,287] End of Test
[28.495,308] FAILED TEST - (Does not prevent further tests).

===End of Script===============================================

Opening script: CT_DCP_R_C.mpet
Compile successful

[28.610,285] DCP Resistance and Capacitance Tests
[28.610,285]
[28.610,315] Initial State:  UUT is connected via Special Test Cable B, or its
                             captive cable, to the PET. No load applied. DCP
                             is switched on. Data lines switched to data
                             measurement circuit.
[28.610,315]
[28.610,316] Emulate attaching PD

[28.610,316] 1.  Apply voltage source  (0.535V) via 200R resistor to D+. Apply
                 voltage source (0.15V) via 15k resistor to D-.
[28.611,345] 2.  Wait TVDMSRC_EN max + 1 ms (= 21ms).
[28.632,346] 3.  Check D- > VDAT_REF min (0.25V).
[28.632,352]     - D- handshake seen OK (D- is at 1.013V.)
[28.632,353] 4.  Wait for 1ms more than the remainder of TVDPSRC_ON (40ms -
                 20ms = 20ms).
[28.652,354] 5.  Disconnect voltage source via 200R resistor from D+.
                 Disconnect voltage source via 15k resistor from D-.
[28.653,383]
[28.653,383] Checking Resistance between D+ and D-

[28.653,384] 6.  Check that resistance from D+ to D- is less than RDCP_DAT max
                 (200R). i.e. Connect 2.0V via 200R resistor to D+, connect
                 0.05V via 200R resistor to D-. Measure voltages at D+ and D-.
                 The difference must be less than 0.67V.
[28.663,422]     FAIL: Voltage difference 1.927V exceeds 0.67V
[28.663,446]
[28.663,447] Checking leakage from D+ or D-

[28.663,447] 7.  Connect D+ via 100k to 0V
[28.663,453] 8.  Wait 2 seconds to eliminate capacitive effects.
[30.663,454] 9.  Check that voltage at D+ is below 1.44V (Two RDAT_LKG (300k)
                 in parallel, VDAT_LKG = 3.6V).
[30.663,458]     - Leakage sourced by D+/D- in spec (V = 0.600V).
[30.663,467] 10. 10. Connect D+ via 100K to 3.6V. Connect D- via 100K to 3.6V.
[30.663,490] 11. Wait 2 seconds to eliminate capacitive effects.
[32.663,490] 12. Check that D+ is not less than 2.65V (Two RDAT_LKG (300k) in
                 parallel, VDAT_LKG = 0V).
[32.663,495]     - Leakage sunk by D+/D- in spec (V = 2.818V).
[32.663,515]
[32.663,516] Checking Capacitance of D+ or D-

[32.663,516] 13. Discharge Standard 1nF capacitor and Capacitance under Test
[32.663,516]     Connect 0V to D+ via 1nF test capacitor. Connect 0V to D- via
                 200R resistor. There is a tested, <200R, resistor between DM
                 and DP. This will discharge the standard 1nF capacitor and
                 the capacitance under test to 0V. Wait 10ms.
[32.673,540] 14. Isolate Capacitances
[32.673,540]     Disconnect 0V from test capacitor to isolate it. Disconnect
                 0V from 200R resistor.
[32.673,552] Note:   We will now use the D+ voltage watch-block to determine
                     whether, during the charge-sharing process, D+ rises
                     above 1.65V. The watch-block amplifier has a limited
                     band-width by design, so that the watch-block voltage set
                     is lower than 1.65V. The actual value can be found in the
                     test script.
[32.673,553] 15. Share Charge Between Capacitances
[32.673,553]     Set DP watch-block to be testing for voltage less than the
                 value required. Connect 3.3V to D+ via 1nF test capacitor.
                 Wait 1ms. This allows for charge sharing between standard 1nF
                 capacitor and capacitance under test.
[32.674,576] 16. Read watch-block to see if voltage on DP went above 1.65V. If
             it did, then the capacitance under test is less than 1nF and
             therefore in specification.
[32.674,581]     - Capacitance is less than 1nF.
[32.674,595]     End of Test
[32.674,609] FAILED TEST - (Does not prevent further tests).

===End of Script===============================================

Opening script: CT_DCP_V_I.mpet
Compile successful

[32.796,085] DCP Voltage, Current and Recovery Time Test
[32.796,114] Initial State:  UUT is connected via Special Test Cable B, or its
                             captive cable, to the PET. No load applied. DCP
                             is switched on.
[32.796,115] 1.  IDCP is initially 0mA. Check that VBUS voltage, samples taken
                 every 1 ms and averaged over TVBUS_AVG max (250ms), from DCP
                 is within VCHG (4.75 - 5.25V).
[33.050,241]     - Vbus average (no load) was 5.076V - in spec.
[33.050,242]
[33.050,242] Emulate attaching PD

[33.050,243] 2.  Apply voltage source  (0.535V) via 200R resistor to D+. Apply
                 voltage source (0.15V) via 15k resistor to D-.
[33.051,272] 3.  Wait TVDMSRC_EN max + 1 ms (= 21ms).
[33.072,272] 4.  Check D- > VDAT_REF min (0.25V).
[33.072,279]     - D- handshake seen OK (D- is at 0.529V.)
[33.072,280] 5.  Wait for 1ms more than the remainder of TVDPSRC_ON (40ms -
                 20ms = 20ms).
[33.092,281] 6.  Disconnect voltage source via 200R resistor from D+.
                 Disconnect voltage source via 15k resistor from D-.
[33.093,310]
[33.093,310] Load Testing

[33.093,311] 7.  Apply load of IDCP min (500 mA) to VBUS.
[33.093,317] 8.  Wait 1 sec to avoid possible transient period (overshoot and
                 undershoot are measured separately).
[34.093,317] 9.  Check that VBUS voltage from DCP, at DCP connector, with
                 samples taken every 1 ms and averaged over TVBUS_AVG max
                 (250ms), is within VCHG (4.75 - 5.25V), making due allowance
                 for voltage drop in cable.
[34.093,318]     Actual lower limit used at PET is 4.418V.
[34.093,318]     This is because 0.272V will be dropped in the test cable at
                 500mA.
[34.093,319]     A further allowance of 0.060V is included to cover variations
                 in the connector resistance plus measurement tolerances.
[34.353,307]     Vbus average (500mA) was 4.976V - in spec.
[34.353,308] 10. Increase load to IDEV_CHG max (1.5A).
[34.363,320] 11. Wait 1 sec to avoid possible overshoot.
[35.363,320] 12. Check that VBUS voltage from DCP, at DCP connector, with
                 samples taken every 1 ms and averaged over TVBUS_AVG max
                 (250ms), is below VCHG max (5.25V), making due allowance for
                 voltage drop in cable. Report the voltage measured.
[35.363,321]     Actual lower limit used at PET is 3.850V.
[35.363,322]     This is because 0.820V will be dropped in the test cable at
                 1500mA.
[35.363,322]     A further allowance of 0.080V is included to cover variations
                 in the connector resistance plus measurement tolerances.
[35.621,481]     - Vbus average (1500mA) was 4.780V - in spec.
[35.621,482] 13. Disconnect the current load.
[35.621,494]     End of Test
[35.621,506] PASSED TEST

===End of Script===============================================

Opening script: CT_DCP_REP.mpet
Compile successful

Checklist for Dedicated Charging Ports (DCPs).
----------------------------------------------

DCP1:  Is the output voltage of the UUT less than
       VCHG_OVRSHT max for any step change in load
       current, and also when powering on of off?
                                                        - YES (PASS)

DCP2:  Is the output current of the UUT prevented
       from exceeding ICDP max under any condition?
                                                        - Vendor Declaration

DCP3:  If the UUT switches roles among SDP, CDP and
       DCP, does it allow VBUS to drop to less than
       VBUS_LKG and wait for a time TVBUS_REAPP
       before driving VBUS again?
                                                        - Vendor Declaration

DCP4:  The UUT vendor has proven with schematics or
       by some other explanation that if there is a
       single failure, the output voltage on VBUS
       will not exceed VCHG_FAIL?
                                                        - Vendor Declaration

DCP5:  As per provided UUT description: if the UUT
       provides multiple USB Charging Ports, the
       active UUT USB Charging Port does not affect
       operation of any other Charging Port.
                                                        - Vendor Declaration

DCP6:  Does the UUT output a voltage of VCHG
       (averaged over TVBUS_AVG for all currents less
       than IDCP ?
                                                        - YES (PASS)

DCP7:  Does the UUT maintain its supply without
       shutting down, provided that the load current
       is less than IDEV_CHG and the load voltage is
       greater than VDCP_SHTDWN ?
                                                        - YES (PASS)

DCP8:  Is the output voltage of the UUT greater than
       VCHG_UNDSHT min for any step change in load
       current from IDCP_LOW to IDCP_MID ?
                                                        - YES (PASS)

DCP9:  Is the output voltage of the UUT greater than
       VCHG_UNDSHT min for any step change in load
       current from IDCP_MID to IDCP_HI, including
       steps that occur TDCP_LD_STP after a
       transition from IDCP_LOW to IDCP_MID?
                                                        - YES (PASS)

DCP10: Is the duration of any undershoot less than
       TDCP_UNDSHT ?
                                                        - YES (PASS)

DCP11: Does the output voltage of the UUT drop below
       VCHG min for less than TDCP_UNDSHT, any step
       change in load current from IDCP_LOW to
       IDCP_HI provided the load current is less than
       IDCP min ?
                                                        - YES (PASS)

DCP12: Does the UUT have a resistance between D+ and
       D- of RDCP_DAT ?
                                                        - NO (FAIL)

DCP13: Does the UUT have a leakage current from D+/D-
       less than or equal to RDAT_LKG tied to a
       voltage of VDAT_LKG ?
                                                        - NO (FAIL)

DCP14: Does the UUT have a capacitance from D+/D- of
       CDCP_PWR ?
                                                        - NO (FAIL)

DCP15: Does the UUT have a Standard-A receptacle, or
       a captive cable terminated with a Micro-B plug?
                                                        - Inspection

===End of Script===============================================

===End of Test Sequence========================================

----RESULT SUMMARY----
Pass - CT_DCP_OVRSHT.mpet
FAIL - CT_DCP_HNDSHK.mpet
FAIL - CT_DCP_R_C.mpet
Pass - CT_DCP_V_I.mpet
Pass - CT_DCP_REP.mpet

===End of Report===============================================

BC1.2_DCP_P2_CC2_2.txt
Packet-Master USB-PET Report on Product
Copyright � 2010-2015 MQP Electronics Ltd.
Scripts OTG 2.0 Rel:1.4.1.0, BC 1.2 Rel:1.2.1.7
Test run on Thursday, September 14, 2023 16:48:35
_________________________________________________

Opening script: CT_DCP_HNDSHK.mpet
Compile successful

[0.087,137] DCP Handshaking Test
[0.097,178]
[0.097,179] Initial State: UUT is connected via Special Test Cable B, or its
            captive cable, to the PET. No load applied. DCP is switched on.
            Data lines switched to data measurement circuit.
[0.097,179] 1. Check VBUS is above VOTG_SESS_VLD max (4V). [DCP6]
[0.097,185]     - VBUS is at 5.098V. We may proceed.
[0.097,186] 2. Wait 200ms
[0.297,186]
[0.297,187] Primary Detection

[0.297,187] 3.  Apply voltage source  (0.535V) via 200R resistor to D+. Apply
                voltage source (0.15V) via 15k resistor to D-.
[0.298,216] 4. Wait slightly more than TVDMSRC_EN max (20ms +1 ms = 21ms).
[0.319,217] 5.  Check D- voltage is in range VDM_SRC (0.5V - 0.7V). [DCP12,
                DCP13]
[0.319,223]     FAIL: D- is 1.013V.
[0.319,225] 6. Wait 20ms to complete TVDPSRC_ON.
[0.339,226] 7.  Disconnect voltage source via 200R resistor from D+.
                Disconnect voltage source via 15k resistor from D-.
[0.339,238]
[0.339,238] Secondary Detection
[0.339,238] 8.  Apply voltage source  (0.535V) via 200R resistor to D-. Apply
                voltage source (0.15V) via 15k resistor to D+.
[0.340,267] 9. Wait 21ms.
[0.361,268] 10. Check D+ voltage is in range VDM_SRC (0.5V - 0.7V). [DCP12,
                DCP13]
[0.361,274]     FAIL: D- is 1.004V.
[0.361,276] 11. Wait 20ms to complete TVDMSRC_ON.
[0.381,277] 12. Disconnect voltage source via 200R resistor from D-.
                Disconnect voltage source via 15k resistor from D+.
[0.381,288] 13. Wait 5 seconds for UUT to recover.
[5.381,289]
[5.381,289] End of Test
[5.381,311] FAILED TEST - (Does not prevent further tests).

===End of Script===============================================

===End of Test Sequence========================================

----RESULT SUMMARY----
FAIL - CT_DCP_HNDSHK.mpet

===End of Report===============================================

BC1.2_DCP_P2_CC1_3.txt
Packet-Master USB-PET Report on Product
Copyright � 2010-2015 MQP Electronics Ltd.
Scripts OTG 2.0 Rel:1.4.1.0, BC 1.2 Rel:1.2.1.7
Test run on Thursday, September 14, 2023 16:49:35
_________________________________________________

Opening script: CT_DCP_R_C.mpet
Compile successful

[0.093,837] DCP Resistance and Capacitance Tests
[0.093,838]
[0.093,867] Initial State:  UUT is connected via Special Test Cable B, or its
                            captive cable, to the PET. No load applied. DCP is
                            switched on. Data lines switched to data
                            measurement circuit.
[0.093,867]
[0.093,868] Emulate attaching PD

[0.093,868] 1.  Apply voltage source  (0.535V) via 200R resistor to D+. Apply
                voltage source (0.15V) via 15k resistor to D-.
[0.094,897] 2.  Wait TVDMSRC_EN max + 1 ms (= 21ms).
[0.115,898] 3.  Check D- > VDAT_REF min (0.25V).
[0.115,904]     - D- handshake seen OK (D- is at 1.013V.)
[0.115,905] 4.  Wait for 1ms more than the remainder of TVDPSRC_ON (40ms -
                20ms = 20ms).
[0.135,906] 5.  Disconnect voltage source via 200R resistor from D+.
                Disconnect voltage source via 15k resistor from D-.
[0.136,935]
[0.136,936] Checking Resistance between D+ and D-

[0.136,936] 6.  Check that resistance from D+ to D- is less than RDCP_DAT max
                (200R). i.e. Connect 2.0V via 200R resistor to D+, connect
                0.05V via 200R resistor to D-. Measure voltages at D+ and D-.
                The difference must be less than 0.67V.
[0.146,974]     FAIL: Voltage difference 1.929V exceeds 0.67V
[0.146,998]
[0.146,999] Checking leakage from D+ or D-

[0.146,999] 7.  Connect D+ via 100k to 0V
[0.147,005] 8.  Wait 2 seconds to eliminate capacitive effects.
[2.147,006] 9.  Check that voltage at D+ is below 1.44V (Two RDAT_LKG (300k)
                in parallel, VDAT_LKG = 3.6V).
[2.147,011]     - Leakage sourced by D+/D- in spec (V = 0.599V).
[2.147,019] 10. 10. Connect D+ via 100K to 3.6V. Connect D- via 100K to 3.6V.
[2.147,042] 11. Wait 2 seconds to eliminate capacitive effects.
[4.147,043] 12. Check that D+ is not less than 2.65V (Two RDAT_LKG (300k) in
                parallel, VDAT_LKG = 0V).
[4.147,047]     - Leakage sunk by D+/D- in spec (V = 2.818V).
[4.147,068]
[4.147,068] Checking Capacitance of D+ or D-

[4.147,068] 13. Discharge Standard 1nF capacitor and Capacitance under Test
[4.147,069]     Connect 0V to D+ via 1nF test capacitor. Connect 0V to D- via
                200R resistor. There is a tested, <200R, resistor between DM
                and DP. This will discharge the standard 1nF capacitor and the
                capacitance under test to 0V. Wait 10ms.
[4.157,092] 14. Isolate Capacitances
[4.157,093]     Disconnect 0V from test capacitor to isolate it. Disconnect 0V
                from 200R resistor.
[4.157,104] Note:   We will now use the D+ voltage watch-block to determine
                    whether, during the charge-sharing process, D+ rises above
                    1.65V. The watch-block amplifier has a limited band-width
                    by design, so that the watch-block voltage set is lower
                    than 1.65V. The actual value can be found in the test
                    script.
[4.157,105] 15. Share Charge Between Capacitances
[4.157,105]     Set DP watch-block to be testing for voltage less than the
                value required. Connect 3.3V to D+ via 1nF test capacitor.
                Wait 1ms. This allows for charge sharing between standard 1nF
                capacitor and capacitance under test.
[4.158,129] 16. Read watch-block to see if voltage on DP went above 1.65V. If
            it did, then the capacitance under test is less than 1nF and
            therefore in specification.
[4.158,133]     - Capacitance is less than 1nF.
[4.158,148]     End of Test
[4.158,162] FAILED TEST - (Does not prevent further tests).

===End of Script===============================================

===End of Test Sequence========================================

----RESULT SUMMARY----
FAIL - CT_DCP_R_C.mpet

===End of Report===============================================

Can you help check why we are getting these failures? And how can we pass this compliance test? Thank you!