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LM61480: design review, PCB

Part Number: LM61480

Hi, I'm using [LM61480Q5RPHRQ1, VoutFIX = 5V, Iout = 8A]. I see this in the layout guideline "Make the top and bottom PCB layers with two-ounce copper and no less than one ounce.".  

I'm using 6-layers PCB which every layers are 1oz. thickness. Will any problem occurs If the top layer is not 2oz. Can another layer be used to add more copper? (especially SW-node, add more coppers to this node using vias to another layer good idea or not?).

Layer 2, 5 is GND plane. The left spaces will be poured with GND Vias later.

Ps. If there're any bad design I may not realise, please tell me.

  • Hi,

    It is recommended to have 2oz on top layer where the IC sits since this layer is where most of the heat will flow from IC onto board. 

    However since your design is a 6 layer board, I think 1oz cooper would be okay so long as you have several inner GND layers with adequate thermal vias to connect the top layer to inner layer. Also it is important to keep the GND plane as unbroken as possible to allow for the best heat flow.

    For the high frequency input capacitors and decoupling capacitors, please try to place them as close as possible to the VIN pin to make the VIN/GND loop as small as possible since this loop is a critical loop that impacts EMI.

    Regards,

    Jimmy

  • Hi Jimmy,

    Thanks for your replied. Yes, I'm making sure Layer 2 & 5 are all GND plane with no cutouts and as much as possible GND vias are around the IC.

    What about the SW node, Is this node require more copper from another layer?

    Regards,

    Wipop

  • Hi Wipop,

    SW node should only be on the top layer and made as small as possible. What you have shown right now in red is okay. 

    Do not have SW node on inner layers or any vias for SW since this will increase SW node area and potentially cause noise to couple to device.

    Regards,

    Jimmy

  • Hi Jimmy,

    Thanks for your support, I've improved my design, thanks.

    Regards,

    Wipop