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Thank you for your interest in the UCC28512 combination PFC/PWM controller.
By "C1" I assume you are referring to C1 in Figure 1 on page 11 of the data sheet. ESR in the PFC output capacitor (C1) has no influence on the stability of PFC regulation.
The voltage-loop bandwidth of PFC is so low (typically ~10Hz) that the ESR is irrelevant to the control loop. The only concern over ESR in C1 is how much power it dissipates within the capacitor based on both the low frequency 2xf_line component and the high switching frequency currents from both the PFC and the downstream converter. ESR is different at low and high frequencies so that needs to be accounted for.
It depends on the nature of the voltage peaks that you are observing.
Average PFC output voltage is usually around 390Vdc. High frequency voltage ripple from ESR is probably less than 1V, so will generally be unnoticeable. Low frequency voltage ripple (due to low PFC regulation bandwidth) may be on the order of 10~30Vpk-pk, and this is normal. You can't have PFC without it. Transient peaks (positive and negative) from line and load steps are also on the order of a few 10's of volts, and are also due to low control BW.
The last two (line-freq ripple and transient peaks) are a function of the capacitance value. Higher cap results in lower peaks, but adds more cost and requires more space. Lower cap is cheaper and smaller, but has higher ripple. Too much ripple and large transient peaks from too low of C1 value will start to trigger other PFC protection functions like OV and UV, etc.
There is a reasonable middle ground where you get good PFC function with peak-peak output ripple (low frequency 100~120Hz) about 5% of the nominal output voltage. Larger cap size may be needed for specials considerations such as longer hold-up time to sustain the load during AC line dropouts. If such hold-up is required for your application, the extra cost and space is unavoidable, but the ripple will be lower.
