• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 64 subscribers
  • Views 350 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS922055: Minimum Headroom between Vin and aggregate Vf needed if (possibly) bypassing UVP protection

Rob Garrone
Prodigy 10 points
Part Number: TPS922055

Hi there, 

I'm currently designing with TPS922055 and am using this part to drive 5x LEDs in series. The Vf for each LED is something like 3.5V each worst case. I am setting the max current through this LED chain to 1A. My Vin for this circuit is 20V. The circuit looks very similar to the application example given in figure 9.2.1. in the data sheet

At 3.5V x 5 LEDs I have an aggregate Vf of 17.5V. This leaves 2.5V of headroom between my 20V input. If I assume I can be as low as 19V on my input, I'm left with 1.5V of headroom between Vf and my rail. Additionally, 1.5V is very close to the 1.2V comparator voltage against which UVP is measured, and even if I DNI R2 and 0ohm R1 (referring here to the voltage divider on UVP shown in figure 9.2.1) I'm not left with much room vs the 1.2V comparator threshold of UVP and run the risk of a false fault.

To get around this, I'm considering tying UVP directly to Vout (which is more-or-less just Vin rail at the beginning of the LED chain), so that we never run the risk of tripping UVP. I understand I lose protection against an LED- short to PGND, but that may not matter so much for my application. 

The question is, what is my LED driver headroom should I forego the UVP feature by tying the UVP pin to Vout? Is it just the Rdson of the internal FET (0.15ohms) multiplied by my current being sourced to the LED string (max 1A, in my application) for a total of 0.15V?  What implication does coming so close to this headroom limit have on the efficiency of the TPS922055? 

Are there any other pitfalls to consider here while running this circuit with a high-ish aggregate Vf vs its input voltage? 

Thanks!

Rob 

  • 0
    TI__Mastermind 19920 points

    Hi Rob,

    Please refer to my comments below. V_LED refers to the forward voltage of the LED (string) at the target output current I_LED.

    • If you do not want UVP protection feature or you just want UVP protection never to be triggered, just left UVP pin floating. We have made an internal pullup within the IC. When you leave UVP pin open, it will be pulled up to VCC and therefore UVP protection will never be triggered.
    • Some considerations when designing TPS922055 with small gap between Vin and V_LED (Below conditions applies to situations when UVP protection is not triggered): 
      • The IC will regulate the output current to the target value as long as Vin > V_LED + I_LED * R_DSON + I_LED * R_SENSE + I_LED * DCR_L. (R_DSON is the on resistance of the internal FET of the IC. R_SENSE refers to the resistance of the sense resistor. DCR_L refers to the DC resistance of the inductor.)
      • As the Vin is getting smaller, the IC will work in the condition that meets "switching FET minimum off time" requirement as shown in the Section 7.5 Electrical Characteristics from the datasheet. In this condition, the IC will reduce the switching frequency itself and continue working.
      • When Vin < V_LED + I_LED * R_DSON + I_LED * R_SENSE + I_LED * DCR_L, the COMP pin will be clamped high. The internal FET of the IC will be always on. The output current will mainly depend on the I-V curve of the LED. You can view it as you directly apply Vin to the LED (string) through sense resistor, inductor, and internal FET.
      • The output current when the voltage of CSP pin > 2V and when CSP voltage < 2V may have a small difference due to some internal designs. If your application does not need extremely consistent output current accuracy, you can neglect this limitation. Otherwise, please leave at least 2V gap between Vin and V_LED.

    Best Regards,

    Steven

  • 0 in reply to Steven Li
    Prodigy 10 points

    Steven, 

    Thank you for the detailed answer - this is very helpful. 

    One more question -  I'm doing the calculations for the inductor current ripple (and ultimately Cout) and the datasheet gives a definition for the "total dynamic LED resistance" (equation 7), which is defined as delta Vf over delta If (multiplied by the # of LEDs). The datasheet is vague on this calculation - it just says to "consult the LED manufacturer's datasheet". 

    What is delta Vf and delta If for the RLED calcuation? Is it the nominal Vf and the nominal If, or something else? 

  • 0 in reply to Rob Garrone
    TI__Mastermind 19920 points

    Hi Rob,

    You can check Figure 2. V-I Characteristic of LED(SFH4715A) from this application report: Loop Response Considerations for Peak Current Mode Buck LED Driver Application

    The RLED in this figure should illustrate how the dynamic LED resistance (for a single LED) is defined.

    Best Regards,

    Steven