Other Parts Discussed in Thread: UCC28740-Q1
Hi:
I designed a flyback converter with reference to PMP41009. However, the circuit does not work properly.
The initial state HV pin and VDD pin waveform is shown in Figure 1.Their potential rises in synchronization,and at this time I can observe three trigger pulses when the VDD voltage reaches the on-threshold threshold.
Figure1:
After modify Rs1 to reduce VIN(run), the HV pin and VDD pin waveforms become shown in Figure 2.There is a voltage difference during rise time.And I cannot observe the gate output at this time.
Figure2:
Can you tell me what situations can cause this?
thank you very much,
best wishes for you!