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TPSM843B22: About how to connect to Intel Aria10 SoC

Part Number: TPSM843B22
Other Parts Discussed in Thread: TPS543B22

We are considering using TPSM843B22 as a power supply for Intel Aria10 SoC.
This FPGA has pins for remote sensing called VCCLSENSE and GNDSENSE.

We are thinking of connecting FB to VCCLSENSE and GOSNS to GNDSENSE, but is it possible to connect like this?
Also, what values will RFBT and RFBB be in this case?
TPSM843B22's VOUT outputs 0.9V.

  • Hello,

    A response will be posted by tomorrow.

    Best,

    Calan

  • This  is an example for the IC layout but it will be the same for the module.

    Connect the FB and GOSNS similar to the image below. 

    Place traces to the VCCLSENSE and GNDSENSE pin, there should be a ceramic capacitor on the VCCLSENSE and GNDSENSE.  

    The feedback resistors should be near the regulator. 

  • Hi David,

    Thank you for your reply.

    I have two question.

    1. In which document is the attached drawing published?

    2.There is no mention of the capacitor you answered in either the TPSM843B22 documentation or the Intel documentation.
    Could you point me to the documentation that describes this?

    > there should be a ceramic capacitor on the VCCLSENSE and GNDSENSE.  

    Thanks.

    Minoru

  • The drawing is from the TPS543B22 datasheet.

    The datasheet does not explicitly state connect at the capacitor

    for FB or GOSNS, but to the desired point of regulation which is the output voltage node.   

    We have found that  If the sense trace is long a high frequency ceramic capacitor can be beneficial for filtering noise. 

  • Hi David,

    I have a few more questions.
    1. Is it correct to understand that the capacitor is placed between the signal (FB and GOSNS) and GND?
    2. Is it better to put the capacitor in both the TPSM843B22 side terminal and the Arria10 side terminal?
    3. I think GNDSENSE is the GND level, but is it okay to insert a capacitor and move it away from the GND level?
    4. What is the recommended capacitor value?

    Thank you,

    Minoru

  • 1.   No,   connect on vout side of the feedback resistor connected to FB and GOSNS (drawn red box (Cf) when using remote resistors).

    Usually, there are 2 resistors (0 ohm) for the remote sense and 2 resistors (100ohm when using remote,  0 ohm when not using remote)

    local sense near the inductor.   The local sense is a fail safe prevents open connection on feedback for when the processor is removed. 

    2  The VCCLSENSE and GNDSENSE are kelvin connections to the die.  There should capacitors on the VCCL and GND supply rail. 

    3  I do not understand. 

    4   approximately  ~100pF to 1000pF. 

      

  • Hi David,

    I understand what you are saying.
    The capacitor is placed between FB and GOSNS.

    However, I don't understand the following explanation.
    >Usually, there are 2 resistors (0 ohm) for the remote sense and 2 resistors (100ohm when using remote, 0 ohm when not using remote)

    I understand that the registers placed in each of remote sense and local sense are used to select either remote sense or local sense.
    When using remote sense, I know that the resistance on the remote sense side is 0ohm, but I think the resistance on the local sense side is not used (not implemented).
    Why do you also connect the local sense side (VDDOUT and GND) with 100ohm?

  • The capacitor is not placed between FB and GOSNS.  The capacitor is placed between Vout and GOSNS near feedback resistors

    Why do you also connect the local sense side (VDDOUT and GND) with 100ohm?  See image.   If the processor is removed, the remote feedback (0 ohm path) is open and will not be connected to the output,   The 100 ohms are used so that if processor is not installed or removed from a socket the power supply will regulate and can be tested. 

  • Hi David,

    I understand very well, thank you very much.