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UCC5350-Q1: Error in simulation

Part Number: UCC5350-Q1
Other Parts Discussed in Thread: TINA-TI

Hi Team,

Recently I'm working on Gate driver design where I'm planning to use UCC5350MCD part. I have designed the circuit in LTSpice and tried simulating it, I didn't get any error as of now but the output is not as what i was expected. I'm getting a small duration surge (apart from normal transient surge) across MOSFET VDS. I tried changing deadtime & Gate resistor value but still I didn't see any improvement. 

It would be helpful if someone can point out where I'm going wrong.

Thanks in advance.

  • Hi Anand, 

    Our expert on this device is currently out of office for the Thanksgiving holiday. Please expect a response early next week when we are back in office. Thank you! 

    Vivian

  • That should be fine Vivian.

  • Hi Anand,

    This looks like it is related to the series inductor. Can you put a 1K resistor across it and see if it mitigates the spike?

    Best regards,

    Sean

  • Hi Cashin,

    Thanks for the input. I found a temporary solution for that. I need some clarification on how to reduce the overshoot at the MOSFET output (VDS). As per general guidelines, it mentioned as "by increasing Rgate or by adding RC snubber, overshoot can be reduced" but I didn't see any improvements in my simulation by doing above changes. What might be the reason for that?

    Is there any other method to reduce MOSFET overshoot (except reducing parasitic inductance)?

    Thanks,

  • Hi Anand,

    This Vds spike is an important problem to solve in a power supply design, as it will otherwise damage you switches or force you to use more expensive high voltage switches than required. The V= L * dI/dt. Adding a gate drive resistor would increasing switching dt, and reduce the dI/dt. You really need to increase dt a lot to slow the gate charge for a small Cgate, and this also increase switching losses.

    A solution I prefer is to add a snubber to the supply rail. This is more to stop the switch node from ringing back and forth, but it does reduce the spike amplitude a little. I attached an TINA-TI example of how to optimize the snubber resistor value for a given power rating.

    Another way to guarantee the switches are not subject to overvoltage is to use TVS diodes. This is not a popular solution but they are fool-proof, and allow you to use voltages very near the FET voltage ratings.

    Another solution is to use a ground/power plane. This will reduce the inductance a lot, and reduce the under/overshoot. Once you have a low inductance plane, it is a lot easier to add clamping diodes for transient voltages where they appear.

    Best regards,

    Sean

    0474.GateRing3.TSC

    P.S., remember that a closed switch is immune to overvoltage. If you see high voltage ringing across two pins that are shorted, you are likely measuring a voltage across a parasitic inductor, not the silicon. 

  • Thanks for the info Cashin,

    But, when I add RC snubber at the output, the VDS ringing got eliminated whereas overshoot still remains same as 120V. I suspect some issue with my simulation setup. 

    below are the output images with and without RC/RCD snubber.

    Let me know your thought on this.

  • You don't really want to add the snubber onto the switched node itself. There it will have to charge and discharge to a high voltage every cycle and burn a lot of power.

    The most effective snubber is one that is on the local decoupling capacitor. It gets shorted to the switch node when the high side switch closes. This will let you dampen the resonance without the capacitor needing to cycle high voltage. You might need two snubbers: one to snub the drain inductance of the FET package, and one to snub the overall supply inductance from the battery or large decoupling capacitors. They will ring at two different frequencies. 

    You are right that the snubber won't clamp the initial peak that much, but you do need to get rid of the resonance too. It can couple into the gate driver and cause damage. It also decreases the usable duty cycle of the PWM.

    To get rid of the peak you should try to use TVS clamping diodes. They absorb the first peak, and if the switch node+supply is weIl damped, the voltage will just recover to the right value with minimal ringing. IGBTs have a natural avalanche breakdown that absorbs these peaks (within reason), which is a significant benefit vs. SiC. It might be worth looking at if you can sacrifice switching and conduction losses and are very concerned about overvoltage. Usually, though, The switching loss is the first priority, and you are better off using TVS diode to address this issue.

    Note that a power plane will have significantly lower inductance vs. a trace. This increases the resonant frequency to a level where it will be damped better by the low parasitic series resistance, and will therefore lower the peak voltage.

    Best regards,

    Sean

  • Hi Cashin, 

    thanks for the detailed explanation on the issue. As you suggested, I tried adding TVS diode across MOSFET (VDS) and saw significant drop in the overshoot (at least below mosfet avalanche) compared to snubber circuit.

    But the problem is finding the right automotive qualified TVS part with high voltage and current rating. Is there any method to use low breakdown voltage TVS to suppress the overshoot.

  • Hi Anand, what voltage do you need? There are TVS diodes that go up to 120V standoff voltage. Beyond that is a challenge.

    An avalanche-rugged device basically acts like a zener TVS clamp. Look for a switch rated for repetitive avalanche energy. This would be a helpful feature if you need clamping at a very high voltage. It is measured in an unclamped inductive spike test.

    Best regards,

    Sean

  • I'm looking somewhere around 60V standoff for 150+A current. Probably one or two was available from Bourns.  

  • How do you figure 150A? Usually you need to stay below 2W for a TVS diode.

  • Hi Cashin,

    I don't know whether my understanding is right.

    The need for 150+A TVS is that each power MOSFETs are carrying ~200A current normal operation. So I though to have equally rated TVS to suppress the shoot-through during switching. 

    Any different opinion on this?

  • The TVS diode does not conduct 200A DC like the MOSFET. There is a small, parasitic LC resonant tank across the MOSFET. When the fet closes, it applies a voltage step to this resonant tank. The TVS diode only needs to clamp the surplus current in this small inductor after 200A is reached. This is something you can likely simulate.

  • Oh, okay.

    Thanks for the confirmation. I will try following the same.

  • Good luck with your design.