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TPS709: TPS70933 EN pin control

Part Number: TPS709


I've uploaded your model into LTSpice and simulated it to understand the EN pin configuration.

The EN pin follows the IN voltage if <6.5V and is clamped to 6.5V by an internal zener.

I want to control the TPS709 operation by external voltage through the N-Channel FET that pulls down the EN pin to disable the regulator.

I see it's working well in simulation, but would like to understand if this is an acceptable control type. Do I need to limit the current from the EN pin to GND when disabling it (pulling low) with some external resistor or it's limited internally by a 300nA current source?

  • Hey Brian,

    As EN pin of TPS709 can be left floating and there is a internal pull-up current of 300nA mentioned in the datasheet.

    For this, two conditions need to be met for the M1 switch:

    i. While turning-on the LDO, In the off-state of M1 (NMOS), you need to ensure that the leakage of M1, ~15x lower than pull-up current of EN (300nA). Otherwise, higher leakage through Switch M1 can create a situation, where EN pin voltage is not rising up-to VIH threshold and LDO is not able to turn-on. At higher temperature the internal pull-up current can go as high as 600nA at higher temperatures. 

    ii. When EN is pulled low by turning on M1 switch, the drive of M1 FET should be higher than 300nA so that EN is pulled to 0 effectively. It is limited internally by 300nA current source only. 

    Rohit Phogat