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[FAQ] TPS65220: TPS6522053RHBR schematic review for AM64x

Kavin Ravi
Prodigy 100 points
Part Number: TPS65220
Other Parts Discussed in Thread: TPS65219,

Hi,

Please find attached the TPS65219 Schematic and Layout Checklist.

We use PMIC, TPS6522053RHBR  along with TPS22965DSGT in one of our products. Could you please review the schematics?

Thank you.

Regards,

Kavin

TPS65219 Schematic, Layout Checklist.xlsx3630.PMIC.pdf

  • 0
    TI__Mastermind 20486 points

    Hi Kavin,

    Thank You for using E2E! We will take a look at the PMIC schematic and provide an update by Jan-9-2024. 

    Thanks,

    Brenda

  • 0 in reply to Brenda Diaz
    TI__Mastermind 20486 points

    Hi Kavin,

    I have reviewed the PMIC schematic and added the feedback below. The schematic that was shared only had the PMIC and passive components but didn't include the connections to the processor. Please make sure the full design is reviewed by the Sitara team so they can provide feedback on the processor side. 

    • Need to increase output capacitance on the Bucks. TPS6522053 has all Bucks configured as quasi-fixed frequency and high bandwidth which requires higher output capacitance. The table below shows the required capacitance for each switching mode. Quasi-fixed frequency and high bandwidth typically use 47uF per Buck.

    • VLDO1 is missing the output capacitor.  This rail is enabled by default in the TPS6522053 NVM config and requires a 2.2uF input and output cap even if the rail is unused in the application.
    • VSYS pin requires at least 2.2uF capacitance. If C31 will be placed close to the VSYS pin, then no further actions are needed. 
    • Didnt see the pull-up resistors for the I2C pins (SCL/SDA). No actions needed if these resistors exist in other pages of the full schematic.
    • The PMIC nRSTOUT pin ("PMIC_PGOOD" in the schematic) is pulled up to a 3.3V supply. If customer is using this signal to drive the MCU_PORZ on the processor, they must add an AND gate, a level shifter or any other circuitry that would convert this signal into 1.8V. This is because MCU_PORz on the processor uses a 1.8V domain.

    Thanks,

    Brenda

  • 0 in reply to Brenda Diaz
    Prodigy 100 points

    Hi Brenda,

    Thank you for reviewing our schematic.

    We will have our full design reviewed by the Sitara team.

    We increased the output capacitor from 10uF (Buck 1) and 22uF (Buck 2&3) to 47uF.

    Added a 2.2uF capacitor to VLDO1.

    Capacitor C31 will be placed close to VSYS.

    I2C pins (SCL/SDA) have pull-ups on another page.

    The PMIC nRSTOUT pin is ANDed on another page.

    Thank you.

    Regrads

    Kavin

  • 0 in reply to Kavin Ravi
    TI__Mastermind 20486 points

    Thank You Kavin. If the feedback provided answered your questions and no additional support is needed from the PMIC team, please click on the "Resolved" option so we can close this ticket.

    Thanks,

    Brenda

  • 0 in reply to Brenda Diaz
    Prodigy 100 points

    Hi Brenda,

    We referred to the 'AM64xx STARTER KIT EVM BOARD' for the PMIC (schematic is attached). The output of the 3 Bucks have 10uF (Buck 1) and 22uF (Bucks 2 & 3) capacitors. Our power requirements are the same as those of the EVM BOARD. I was wondering why we need to increase the output capacitance of the Bucks while the EVM Board uses 10uF and 22uF.

    Thank you

    Regards,

    Kavin

  • +1 in reply to Kavin Ravi
    TI__Mastermind 20486 points

    Hi Kavin,

    The AM64 EVM was developed before the TPS6522053 NVM was released. The team had originally planned to use low bandwidth with lower output capacitance but was changed to high bandwidth to make the PMIC NVM more generic and cover a broader set of applications that might require higher load transient due to peripherals. 

    Thanks,

    Brenda