Hi , in the data sheet Junction-to-top characterization parameter is 0.3 C/W . I see in the pictures of the module that the case top is made of plastic , how can you get 0.3 C/W with that cover ?
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Hi , in the data sheet Junction-to-top characterization parameter is 0.3 C/W . I see in the pictures of the module that the case top is made of plastic , how can you get 0.3 C/W with that cover ?
Hello Druker,
I am not sure fully understand you question.
these value are based on thermal modeling and characterization on the bench, for more info please see the link below.
Thanks!
Tahar
Hi Tahar , in D2PACK case the typical junction to case is 0.5 C/W .How is it better in this module ?
Hello Druker,
I can not comment on the D2PACK, but for TI, we are following the JESD standard. The thermal resistor depends on many factors including package size, the package type, the number of pins and their locations, the die size, the die thickness, the die pad size, the die impedance, power stage size and location...etc. For modules, the integrated component, their location and number of layers, the mold comp thermal conductivity, package thickness, conductivity of the plastics mold...etc.
So we can NOT just be comparing blindly devices, there are many factors that get influence the thermal results.
Thanks
Tahar
Hi Tahar ,
I think that there is a mistake on the thermal table (6.4) in the TI data sheet .
In the table , Junction-to-top characterization parameter is much lower than Junction-to-board characterization parameter .
The case of the module seems to be made from a kind of plastic material , the Junction-to-top is measured on the the top of the module on the plastic cover where the thermal conduction is low .
The Junction-to-board is measured on the PCB where the thermal conduction is higher .
Can you please verify with TI that the data are correct ?
Hello Druker,
Let me double check with our thermal team and I will update you on this
Thanks
Tahar
Hello Drucker,
I was able to get more info from our thermal team. Please see below for the thermal image. As i explained in my previous post multiple factors can affect the thermal resistance of the module. As you can see the thermal rise is concentrates around the power stage where most of the thermal dissipation is happening on the die. But also, the inductor heats up due to the fact the inductor has DC and core losses as well. The fact that each is heating each other up and physically located very close, the delta between the two is reduced. Hope that explains you questions.
Parameter |
Result |
Max Die Temp. |
89.2 °C |
Max Ind. Temp. |
89.8 °C |
Eff. Theta-JA (Die) |
13.2 °C/W |
Eff. Psi-JT (Die) |
0.3 °C/W |
Eff. Psi-JB (Die) |
5.5 °C/W |
Thanks!
Tahar