UCC23514: Driver's output has oscillation

Hi Francis,

Do you have a schematic and an oscilloscope measurement to describe your claim?

You should be able to have a stable output with a resistor and even no-load. This device does require an input current above a 2.8mA typ threshold. If the input current is only 2mA for example, the output will toggle between high and low.

Can you try to increase your input side current and see if the problem persist?

Best regards,

Sean

Hi Francis,

All gate drivers, and their decoupling layouts, have some parasitic inductance. In addition, there is always some parasitic output capacitance. There exists a resonant output frequency for all digital outputs, disambiguation. I think of it like a bell.

It seems to me that both our gate driver and the optical gate driver have the same size, layout, and inductance, but the latter has a slower rise time.

You can avoid output oscillation if you limit the dV/dt; that is, increase the rise time and fall time of the gate driver output. That prevents a voltage input that includes the resonant frequency from appearing at the LC circuit. Practically, this means that the voltage rises slow enough to never generate a voltage across the very small parasitic inductor. Intuitively, this is like hitting a bell with a soft enough object to prevent ringing.

Customers often seek very fast rise and fall times because they think it will charge the gate faster, but this is actually dominated by the output saturation current, which is not strictly related to rise and fall time in a high power gate driver.

If you drive a real FET instead of a capacitor load, there should be enough series resistance and load capacitance to stop dinging this high-frequency resonance. 

Best regards,

Sean