• State
  • Locked Locked
  • Replies 5 replies
  • Subscribers 62 subscribers
  • Views 434 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCC28951-Q1: PCB LAYOUT: Gate Tracks

Nishanth M
Intellectual 295 points
Part Number: UCC28951-Q1
Other Parts Discussed in Thread: UCC28951, UCC28180, UCC28950

Hello,

We designed the 2KW Charger using UCC28951 & UCC28180 chip. We need support and clarification on the Gate Tracks layout of the UCC28951. Please check out the below image that the gate track routing are okay or if any problem let me know.

* Yellow - GATE A

* Pink   - Gate B

* White - Gate C

* Green - Gate D

Driver tracks are coming from the Gate Driver Transformer (Vertical Mount PCB's)

Kind Regards,

Nishanth M

  • 0
    TI__Guru* 86286 points

    Hello,

    Your inquiry is under review and I will get back to you shortly.

    Regards,

  • 0 in reply to Mike O'
    TI__Guru* 86286 points

    Hello,

    When laying out tracks with high current you try not to have them run in parallel but orthogonally to tracks they cross.  This is because you can get EMI coupling if the tracks run in parallel. 

    When I reviewed your layout traces A, B and C looked O.K. ;However, trace D looks like it could couple into the other circled traces.  Consider rerouting trace D to avoid this coupling. 

    In regards to laying out a board for the UCC28950 and UCC28951 there is some helpful guidance.

    1.  The data sheet has a section on layout recommendations.  You may find this information useful.

    https://www.ti.com/lit/gpn/ucc28951

    2.  There is a UCC28950 and UCC28951 600 W evaluation board that has a proven layout that you can use a reference/guide to laying out your board.

    https://www.ti.com/lit/pdf/sluu421

    Regards,

  • 0 in reply to Mike O'
    Intellectual 295 points

    Hello Mike,

    Thanks for the reply. We will update the Trace D tracks and please clarify the below points for the attached above design image.

    1. Is there any constraints to match the length of the gate traces top and bottom MOSFET?

    2. Is it okay that the gate traces travelling 60mm from the driver transformer to MOSFET?

    3. Is there any constraint's to route the Gate tracks in symmetrical?

    Kind Regards,

    Nishanth M

  • 0 in reply to Nishanth M
    TI__Guru* 86286 points

    Hello,

    Your inquiry is under review and I will get back to you shortly.

    Regards,

  • 0 in reply to Mike O'
    TI__Guru* 86286 points

    Hello,

    Please see my comments to your questions below.

    1. Is there any constraints to match the length of the gate traces top and bottom MOSFET?

    >A 2.54 cm, 1 in of trace will add roughly 10 nH of inductance.  So longer traces will add inductance.  Keeping the traces as short as possible will help reduce ringing.  You also should also have a resistor in serises with the gate drive.  Genearly 2.2 to 10 ohms will do the trick.

    2. Is it okay that the gate traces travelling 60mm from the driver transformer to MOSFET?

    >This design requires gate transformers.  I would make the traces from the gate driver, gate drive transformer and FET as short as possible.

    The signal traces to the gate driver can be longer because they do not carry current.

    3. Is there any constraint's to route the Gate tracks in symmetrical?

    >Keeping the layout of the gate driver circuitry and symmetrical will give them similar performance.  So this would be similar to the 2 where you would make the gate driver output, gate driver transformer and FET connections symmetrical.

    Regards,