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TPS7A94: VSET/MODE, FIXED OR ADJUSTABLE OUTPUT VOLTAGE

gustavo zarba
Expert 1110 points
Part Number: TPS7A94
Other Parts Discussed in Thread: LP3982

Hi dear people,

continuing with the supply for my design, I am now looking for the use of a TPS7A94 LDO.

My question is about the behaviour of the NR/SS pin.

I would need to implement the Dynamic Voltage Scaling Power Solution described on TIDUC02TIDUC02

By many other devices, the voltage adjustment pin will be disabled, once the device has achieved the desired voltage. This would make the TIDUC02 solution non viable.

However, I cannot find any mention to such a behaviour on the TPS7A94.

Could you please advice me on this matter?

As usual, many thanks in advance

and best regards,

Gustavo

  • 0
    TI__Genius 12165 points

    Hello Gustavo,

    Thank you for your questions.

    I will be reviewing your thread in the day.

    Best Regards,

    Hannah

  • 0
    TI__Genius 12165 points

    Hello Gustavo,

    After reviewing our resources on the power solution: TIDUC02TIDUC02, I was unable to find any information regarding this solution. 

    When you have a moment, would you please send me the resources you are using for this power solution?

    The NR/SS pin is not an adjustable voltage pin. Usually, the FB pin would be an adjustable voltage pin, but in the case of the TPS7A94 LDO, the FB_PG pin is an adjustable current limit pin. The NR/SS pin's intended use is to soft start the device and help with noise rejection as shown in the plots below. With more capacitance, more noise rejection will become present in the system. 

    Please let me know if you have any additional questions or concerns.

    Best Regards,

    Hannah

  • 0 in reply to Hannah Grace
    Expert 1110 points

    Hello Hannah,
    I am very sorry, I did not realise that the name of the resource was wrong. The name is half so long: TIDUC02
    I include the link here Dynamic Voltage Scaling Power Solution for MSP430Tm ...Texas Instrumentshttps://www.ti.com › lit › pdf › tiduc02, so you can see what I am talking about. This is described on p.10 of the document.
    Do you see a chance, this could be implemented on the TPS7A94? Anyway, it would be nice to know how the device adjusts the output voltage, since this section is very short handled on the data sheet.
    Many thanks for the help,

    sincerely,

    Gustavo

  • 0 in reply to gustavo zarba
    Expert 1110 points

    Hi Hannah, sorry again, the procedure for regulating the output of the TPS7A94 is well described on p.26 of the data sheet:

    7.3.1 Output Voltage Setting and Regulation

    Figure 7-1 shows a simplified regulation circuit, where the input signal (VNR/SS) is generated by the internal current source (INR/SS) and the external resistor (RNR/SS). Because the error amplifier is always operating in unity-gain configuration, the LDO output voltage is directly programmed by the VNR/SS voltage. The VNR/SS reference voltage is generated by an internal low-noise current source driving the RNR/SS resistor and is designed to have very low bandwidth at the input to the error amplifier through the use of a low-pass filter(CNR/SS || RNR/SS).

    This unity-gain configuration, along with the highly accurate INR/SS reference current, enables the device to achieve excellent output voltage accuracy; though, the RNR/SS accuracy can become the limiting factor when operating at low output voltage.

    So, for me, it looks that the "    Dynamic Voltage Scaling Power Solution" could be applied, maybe, if the TPS7A94 never stops looking to the NR/SS pin ...

    What do you think?

    Again many thanks!

    Gustavo

  • +1 in reply to gustavo zarba
    TI__Genius 12165 points

    Hi Gustavo,

    Thank you for clarifying the NR/SS pin for me as I was completely mistaken on this specific part. 

    For TPS7A94, the reference is set through an external resistor tied to the NR/SS pin, which is better explained as above. Many of our other parts set the output voltage through the FB pin. 

    I have taken a look at the power solution, TIDUC02, and based on the pinout of the power solution, I do not believe that the TPS7A94 would be able to be implemented with the power solution. The TIDUC02 has a pinout of 8, while TPS7A94 has a pinout of 10. The pinout is also very different with the LDO given in the power solution, LP3982 as shown below compared to the TPS7A94 pinout.

    Please let me know if you have any additional questions or concerns.

    Best Regards,

    Hannah

  • 0 in reply to Hannah Grace
    Expert 1110 points

    Hi Hannah,

    thanks for the reply.

    In fact, I was re-examining the principle of functioning of the "solution" and it will indeed not work with the TPS7A94. Not because of the different pinout, but because on the "solution" R2 is smaller at start and lower when Cdelay is charged. This works well on the LP3982, but since the TPS7A94 regulates the output voltage differently, R needs to be bigger, to regulate a higher output.


    In addition: "the     CNR/SS capacitor and RNR/SS resistor form a low-pass filter (LPF) that filters out the noise from the VNR/SS voltage reference, thereby reducing the device noise floor."
    Any changes here would be detrimental for the noise of the LDO.

    No chance, also. We can close this now.
    Thanks for the guide on seeing this clearly!

    Best regards,
    Gustavo