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Using VCNTL in 4 bits mode

gtrembla
Prodigy 100 points
Other Parts Discussed in Thread: UCD9222, UCD9224, UCD9240

Hi all,

I want to use the second rail of UCD9222 for a fix voltage of 1V.

In PDF SLVSAL7A, it's write that we can use VID pins of UCD9222 in 4 bits mode, but the table giving the code in SPRABI2 document use the 6 bits mode.  There is a different table for 4 bits mode.

I preffer to use the 4 bits mode to hardcoded directly the VID pins instead using some logic to toggle the VID_S pin to send the LSB part and the MSB part.

Gabriel

  • 0
    TI__Guru* 84110 points

    Since this question is about the UCD9222 and not about the C6678, we will have it moved to the Digital Power Forum where someone more knowledgeable would see it.

    It is my understanding that if the VCNTL pins are not used for active voltage control, they are left unconnected and the voltage is set by the internal programming instead of the VCNTL pins.

    We can see what the real experts have to say...

    Regards,
    RandyP

  • 0 in reply to RandyP
    TI__Genius 13700 points

    I was under the impression that the C6678 requires the implementation of SmartReflex which uses VID to dynamically modify the core voltage, but I am not the expert on the processor.

    The UCD9222 can implement either a 4 and 6-bit table thru the VID pins and also 8-bit via the PMBus interface.

    The UCD9222 can be configured to ignore the VID inputs and simply operate based on the VOUT_COMMAND parameter, but I cannot determine if this is acceptable for the processor.

    Should you decide to only use VOUT_COMMAND to define the output voltages then it would be possible to use the UCD9224, no VID capability, which provides additional sequencing and GPIO capabilities.

  • 0 in reply to Brad
    TI__Genius 13700 points

    Sorry, misread the original post.

    VID_MODE is configurable for each rail, so the first rail can implement the core voltage with SmartReflex through its VID pins using 4- or 6-bit mode or through the PMBus interface using 8-bit VID (depending on processor capability) and the second rail can be configured as Ignore VID which enables VOUT_COMMAND for a configurable fixed output voltage.

  • 0 in reply to Brad
    Prodigy 100 points

    But the chip can also boot directly from is ROM, and if we fix the voltage directly in the ROM it should be ok.  So the VOUT_COMMAND are not absolutely requires?

    Also I have another question,  in my design I use 2 UCD9240 to power up a Virtex-6 FPGA and 1 UCD9222 for the DSP.  I want to use the same PMBUS for all controller and this bus will be drive directly with the FPGA.  Can we connect the DSP on this bus like a slave or I need to use absolutely a second PMBUS.

    For the PMBUS_cntrl pin, in some reference design, they connect together all PMBUS_cntrl pin of different controller.  But with the GPIO porgrammer we have a mode to set 1 IO for each different PMBUS_cntr.  What are the difference between those 2 modes?

  • 0 in reply to gtrembla
    TI__Genius 13700 points

    By chip I assume you mean the controller, the operation of the UCD92xx controllers is governed by the configuration stored in the data flash.  Each time power is applied to the controller it pulls the configuration from the data flash.  VOUT_COMMAND is a required configuration parameter for non-VID rails, it is stored in the dataflash during the initial configuration of the controller, later it can be updated if required, but most customers use a fixed value.

    Multiple UCD92xx controllers can exist on a single PMBus segment as long as they are assigned different addresses.  The UCD92xx controllers are slave devices and cannot initiate communication on the PMBus, they can raise the PMBus_ALERT line to request a host system inquiry.  It should be possible to configure the FPGA as the master to the controllers.

    The PMBus_CNTRL pin can be configured as an enable source for any or all of the output rails derived from the controller.  When the same signal is used to drive the control lines of multiple controllers then it can be used as a common time source to aid sequencing.  The GPIO programmer is just applying the configuration so there are no requirements that drive the use of the control line.

  • 0 in reply to Brad
    Prodigy 100 points

    Thanks for information

    So if I use the FPGA as master, the DSP cannot be connected on this bus or we have manner that the DSP doesn't become master like the FPGA

     

     

  • 0 in reply to gtrembla
    TI__Genius 13700 points

    Sorry, my answers relate only to the UCD92xx controllers.  You will need to post the C6678 question back in the ARM & DSP MICROPROCESSORS section of the Forum. 

  • 0 in reply to Brad
    TI__Guru* 84110 points

    The C6678 will be a PMBus Master, when that mode is enabled. The PMBus on the UCD9222 is intended for SmartReflex, so this is not the recommended method for setting a fixed voltage.

    The right solution is to use the VID1 pins for controlling the SmartReflex supply on the C6678. Then set the fixed voltage using the other programmation methods of the UCD9222. You are making your job too difficult trying to use the PMBus for something it does not need to do, in my opinion.

    If you use the VCNTL pins from the C6678 to drive the VID1 pins on the UCD9222, you will be able to get the proper SR operation for the C6678. Then if you still want to use the PMBus on the UCD9222 from the FPGA, there will be no conflict.

    Regards,
    RandyP