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TPS92682-Q1: TPS92682 register configuration issues

zhang lin
Prodigy 190 points
Part Number: TPS92682-Q1

Hello everyone

        I have a few about the TPS92682 .My configuration is as follows:Two-phase boost.

Q1:

CHxMAXDEN function, what is the difference between opening and closing?

Q2:

How is the CHxLEB time set and under what circumstances does it need to be adjusted?

CHxFILT1:ILIM comparator filter time (no specific description)

Q3:

TSD: After the Thermal shutdown occurs, if the fault is removed, will the chip automatically recover? Do other registers need to be reconfigured?

  • 0
    TI__Mastermind 18890 points

    Hello Lin,

    Q1:  CHxMADXEN should be set to disable (0).  This bit if enabled set the max duty ON duty cycle to 100% and for Boost regulator you need time to dump energy to output.

    Q2:  This bit controls the leading edge blanking of the IS current for noise reason.  If layout is done well and then there is no reason to use this BIT.  Set to 0

    Q3:  Yes, the regulator will restart after thermal shut down is removed and there is no need to reconfigure any registers. 

    Thanks Tuan

  • 0 in reply to Tuan Tran74
    Prodigy 190 points

    Thank you for your reply.

    I still didn't understand the first question. Can you explain in detail the function of this pin, under what circumstances it needs to be turned on (1) and under what circumstances it needs to be turned off (0)?

    I read the manual, the CV BOOST configuration recommend in the manual does not close this register（EN:0xB0）.

    My current configuration is: the two-phase BOOST is combined for TPS9250 use, thank you very much!

  • 0 in reply to zhang lin
    TI__Mastermind 18890 points

    Hello Lin,

    Your question 1 has to do with the CHxMADXEN register setting.  This bit if enabled set the max duty ON duty cycle to 100% what this means is that the maximum duty cycle of turning ON the main power FET can go to 100% duty cycle.  For the Boost regulator, the ON time of the FET charges the current up in the inductor and the OFF time is when that current is directed to the output CAP.  This BIT is usually used for a BUCK where duty cycle can be 100%.  Again, for your application the TPS92682 in a Boost configuration this BIT should be left to the default value which is a '0'.

    Thanks Tuan

  • 0 in reply to Tuan Tran74
    Prodigy 190 points

    Thank you very much, your reply is very professional, I finally want to know if the CHxMADXEN is set to 0, if there is close to 100%, what will the chip do, will there be job instability?

  • +1 in reply to zhang lin
    TI__Mastermind 18890 points

    Hello Lin,

    If the design is done properly there should be no issue.

    Thanks Tuan

  • 0 in reply to Tuan Tran74
    Prodigy 190 points

    Hello, what is the maximum duty cycle?

    If the CHxMAXDEN is set to 1, if the maximum duty cycle is reached, if the duty cycle is increased at this time, will the duty cycle increase? What will the chip do and what will the output be?

    If the CHxMAXDEN is set to 0, if the maximum duty cycle is reached, will the duty cycle increase again? What will the chip do and what will the output be?

    Thanks

    CHxMAXDEN:

        0: Maximum duty cycle for the associated channel is disabled.

        1: Maximum duty cycle for the associated channel is enabled.

  • +1 in reply to zhang lin
    TI__Mastermind 18890 points

    Hello,

    As I explained to you...If we set CHxMAXDEN to 1, the maximum duty cycle can get to 100%.  100% is max, it's on all the time and you cannot go any higher than 100%.  For a boost regulator you do NOT want to set this to 1 because of the topology and tranfer of energy in the inductor otherwise you do not have OFF time to transfer the inductor current to the output.  If you do not understand this than please familiarize yourself of the way a Boost Regular works.

    If the CHxMAXDEN to 0 then the maximum duty cycle is about 90%.  Even if the controller demands higher % duty cycle the max it will output is 90%.  If this happens than the output voltage will drop.  Again, if designed properly this will never happens.

    Thanks Tuan