LM74720-Q1: Issues with Enabling Oring

Hi Mo,

Thanks for reaching out to us.

When you pull the EN low, GATE and PD are still high. Is this what you mean by "Circuit remains ON"? 

Ideally, when EN is pulled low, after very short delay, VGS of both the FETs will come to zero. Although the output voltage can still be high depending on load or ORing operation.

Regards,

Shiven Dhir

Hi Shiven,

Thank you for getting back and looking into this.

I meant to say current flows through the Oring MOSFETs no matter what I do to the EN pin. In my tests, I don't have any load connected to the circuit. 

However, I do have the two oring circuits, connected back to back. Output of the first oring (VorBE) is fed as an input to the second oring. Would that be the reason by chance?

Hi Mo,

Can you share a block diagram of the circuit showing how the controllers are connected for better clarity.

Regards,

Shiven Dhir

Hi Shiven,

As requested, please find the block diagram of the circuit below.

As you can see in the diagram, there are three types of Oring circuits used. I'm running into issues with the (1) first Oring circuit

The (1) first type is used on the Battery side, to isolate the batteries from each other and drive the load. The EN pin is connected to a 3.3V switch. But I'm not able to disable this circuit by pulling the EN pin to low. These Oring circuits are always ON.

The (2) second type is used to take any back emf from the load to one of the batteries. The EN pin on this Oring circuit works perfectly. I can enable or disable this OR circuit with a 3.3V switch. 

The (3) third type is used for charging the batteries. These Oring circuits are always enabled, by pulling the EN pin high always.

All the Oring circuits are good at isolating the batteries and work great. But I am not able to enable/disable the first (1) circuit. They stay always on. 

We want to use this circuit in a different project of ours where Enabling and Disabling is critical.

Hi Shiven,

Further to my response above, I went ahead and checked the voltage on the Gate pin of the LM747200. As shown in the image below. With a input power supply of 12V. The Gate pin would be at 12V when I pulled EN to low and it would be at 15V when EN pin is high. Not sure what's happening. 

Hi Mizzi,

The behavior is expected if you measure GATE as 12V with EN low and 15V with EN high.

Gate is driven with respect to source. When EN is low VGS is 0V and hence FET is off. When EN is high VGS is 3V which means FET is on.

Its the Q1 body diode which is conducting when EN is low.

To verify it further, PD should be close to 0V. 

Regards,

Shiven Dhir

Hi Shiven,

Thank you for getting back and explaining. The voltage at Gate makes sense.

I tried checking the voltage on PD and the results are interesting. Please see below:

PD is 8.4V when EN is low and 24.7V when EN is high.

Hi Mizzi,

Can you share a waveform when EN transitions from low to high.

Please measure the following: 

VIN, VOUT, PD, EN, PD-VOUT (using a math function)

VIN, VOUT, Q2_GATE (After the resistor), EN, Q2_GATE - VOUT (using a math function)

Regards,

Shiven Dhir

Hi Shiven,

Unfortunately, I'm in middle of other projects and it'll take some time to get to this.

Can you think of anything that could cause this? Have you experienced anything similar before?

On a high level, I have the following doubts (please let me know if any of these stand out to you)

1. The first (1) oring and second (2) oring are connected in a cascaded fashion. The EN pin on (2) works, but (1) does not. (2) uses ceramic capacitors, (1) uses electrolytic capacitors at the output

2. There's a third (3) oring, that connects to the input of the first (1) oring. Which makes the three orings in a cascaded fashion (3>2>1). EN pin on (3) is always high. The third(3) oring also uses ceramic capacitors. But we are not using the 3rd oring. So I don't think it's causing any issues.

3. I have used another oring circuit on the same board, in a different place (using ceramic capacitors at it's output) and it works fine too.

Hi Mo,

Difference in capacitor types shouldn't cause an issue. Regarding the configuration, provide me some time to look into it.

Meanwhile if you can get me some waveforms, it will be helpful.

Also, try to remove the 270ohms(R11) resistor and test again as it is recommended for high voltage operation only.

Regards,

Shiven Dhir

Hi Shiven,

Thank you for getting back. We'll look forward to hearing from you.

I'll try to get you some waverforms.

Thank you for advising on the 270 ohm resistor. Our system is actually designed for 48V ( I was using 12V just as a reference while testing).

Hi Mo,

Appreciate the patience.

Regards,

Shiven Dhir

Hi Shiven,

Firstly, I truly appreciate you looking into this and persevering for us.

I have two doubts. Please correct me if anything. 

1. I'm seeing a voltage of 24V on PD (with an input battery of 12V) with respect to ground.

2. Would this issue be only isolated to this oring circuit somehow? As, the other oring circuits seems to be functioning alright (particularly oring#2 from my block diagram earlier).

3. I used the same zener which was used in the eval-kit of LM74720, part# BZX84-B18,215. It's not bidirectional. But seems to be okay in other circuits.

Could it be something else?

Hi Mo,

Can you share the requested waveforms.

As we can see when the EN is pulled, PD is failing low but not zero, which is happening because of the resistor divider as explained. Hence controller is reacting fine to EN transition.

Is there a chance that VorBE is around 24-25V due to load motor's back EMF when EN is being pulled low. Due to which GATE is still at around 24V?

2. We are suspecting the output voltage to be higher in this particular case, hence it is not an issue but just difference in system level behavior.

3. Other circuits might not have higher output voltage in ORing. Can you test with bidirectional zener as that is the only path left.

Regards,

Shiven Dhir