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UCC21710-Q1: Erratic behaviour of UCC21710 at start-up

JM Holland
Prodigy 240 points
Part Number: UCC21710-Q1
Other Parts Discussed in Thread: UCC21710, TPS564255, UCC21750

Hello, 

I am observing some erratic behaviour in my gate drive signals from the UCC21710 with an external gate drive BJT buffer. The first few switching cycles are OK, but then there are a set of switching cycles showing undesirable behaviour. Shortly after these, the behaviour returns to normal and the device works fine. See screenshot. 

I have placed additional capacitance on the output of my 3.3V regulator, and additional capacitance on both the VDD, VEE, VCC and COM rails due to the suspicion this was due to either UVLO of either VDD or VCC. However, this did not help solve the issue. I have also noticed there is a period in which after RDY indicates a fault on the supplies, the output of the gate driver is held low for many microseconds - therefore it doesn’t seem to align with the behaviour I am witnessing. Tomorrow I will probe the FLT, RST/EN, and RDY lines and see if anything is being reported by the device, but in the mean time, is there anything else that can cause this behaviour? 

As mentioned, behaviour returns to normal after the initial start-up current draw, and I do not see any extended period of the gate driver holding the output low. 

PS, please ignore the purple trace which was before placing additional capacitance on my regulator and VCC pins. It is now at 3.3V throughout the pulse and does not drop at all. There is noise on the output of the regulator due to switching noise, however this does not seem to be triggering a UVLO fault on either supply.

I am not using the OC pin and it is tied directly to COM.

Compared to the Launchpad for the F2837xD which we are designing this to be controlled by, the only difference is we omit the TPS6162 3V3 regulator and instead use the TPS564255 - which is much higher current capability. It is also variable frequency, and when operated at low load uses quite a low switching frequency. I am curious as to whether this might be the source of the issue, since the switching noise may therefore be larger, and may be interfering with the normal operation of the UCC21710. Is something like this to be expected from the device if switching noise falls below the 3V minimum supply voltage for the driver IC? Possibly the switching noise is not so high that it lasts long enough to cause a UVLO event due to the glitch features, but large enough that it does interfere with normal operation. I will replace this one with the fixed frequency version of the regulator and see if that alleviates the issue.

Any thoughts appreciated. 
JMH

  • +1
    TI__Genius 17186 points

    Hi JMH,

    Let's try to debug. Can you show the input signal too? Otherwise, I can't tell what is wrong with the output. Can you also measure between the UCC21710 and BJT totem pole?

    UVLO problems usually have an easily identifiable recovery time, defined in the datasheet for both supply sides. Assuming that the issue is that the output briefly going low, this would be too fast a recovery for UVLO to explain. 

    Can you also share the schematic? I want to make sure that the BJT isn't presenting too high of a DC current load on the UCC21750 output. 

    Best regards,

    Sean

  • 0 in reply to Sean Cashin
    Prodigy 240 points

    Hi Sean, thanks for the reply. 

    Im not in office at the moment, but can probe those points tomorrow. If it helps, I have probed the input signals to the driver (PWM) and it was verified to be a 200kHz, 50% duty cycle waveform. It should be noted that I’ve performed these tests with a Launchpad F2837xD feeding the 3V3 rail in to the driver, and did not encounter this issue. The output current from the UCC21710 should be around 1.5A which drives the BJT which then outputs around 15A peak into my capacitive load. 

    Im glad we agree on the fact it is not a UVLO event - I noticed the same thing in the data sheet and had to rule out this possibility. But I am still concerned that the noise on my 3V3 rail is too severe to have predictable behaviour from the driver. 

    I’ll probe the input to the base of the transistors/output of the UCC21710 tomorrow which should provide a bit of insight into where the problem is. 

    I am interested though on your opinion on whether switching noise below the 3V minimum voltage of the UCC should cause issues providing the UVLO limit is somewhat below this, and there is a 0.1uF capacitor on the VCC input..?

    Best regards, 

    JMH

  • 0 in reply to JM Holland
    TI__Genius 17186 points

    Hi JMH, 

    There are "deglitch" filters on the inputs and UVLO triggers to prevent this type of problem. But it won't hurt to add decoupling on your input pin. 

    It looks like the propagation delay is changing maybe? Having the input overlayed on another channel will be very helpful. 

    1.5A is a very high DC current to ask for from this driver. It is designed for transient pulses. What BJTs are you using? You should probably stay below 200mA. I recommend a Sziklai pair for the PNP, with no short circuit limiting resistors.

    Best regards,

    Sean

  • 0 in reply to Sean Cashin
    Prodigy 240 points

    Hi Sean, 

    Sounds like a good idea, I’ll give that a go. I’m unsure as to why that would happen but happy to try. Maybe I have been unclear, 1.5A would be the peak current from the driver, not the D.C. average. The BJT input capacitance is low so the power dissipation of the UCC21710 Should be substantially below its nominal rating since it is rated for 10A peak. I’ll probe the PWM input at the device and the output and see if that unlocks any insight. Thanks for your help!

  • 0 in reply to JM Holland
    Prodigy 240 points

    Here are some shots from today. As you suspected there is an issue with the input signal to the UCC21710. I have managed to improve this by adding 1nF capacitors to the output of my 3V3 regulator, which reduces the amount of incorrect gate drive signals, but does not completely alleviate them. It looks like high frequency noise spikes are causing interference with the PWM signals to the 21710, but the output is gracefully following the input as expected. I’ve purchased a 3A, 3V3 regulator from TI that maintains a constant 1,2MHz frequency across load current changes in hopes that the switching noise will be significantly reduced. I assume the fact our regulator switches close to the frequency of the required PWM signal, this is causing the issue. Let me know your thoughts! 

  • 0 in reply to JM Holland
    TI__Genius 17186 points

    Hi JM,

    I've had problems when I accidently don't solder both ends of decoupling capacitors on my uC, but usually the effects are much more dramatic. 

    It sounds like a new regulator will help. Maybe you could add ~100nF to the existing rail. 1nF is not a lot. 

    The switching frequency hopefully is not showing up anywhere outside the chip. But maybe output current is not the problem. Don't people usually use an LDO at 5V & 3.3V? If you are powering logic devices you need to make this rail very flat. Switching buck converters are fine for powering the gate driver outputs, but probably not the inputs or logic dealing ICs.

    Best regards,

    Sean

  • 0 in reply to Sean Cashin
    Prodigy 240 points

    Hi Sean, 

    I have marked your first answer correct as it is clearly an issue outside of the UCC21710 and probing the input signals did help debug this.

    I think I may already have 100nF in place but it did not offer much help. The high frequency noise might be a bit higher than anticipated. We do have some LDOs on the board as we mostly followed the Launchpad schematic, which does have a buck regulator to convert the 5V USB rail to an intermediate 3.3V. This however is significantly higher in frequency, which is why my suspicion is that our choice of regulator is not sufficient - it may switch at 150kHz or lower at supply currents of 0.1A… it is clear that the amount of cycles that are not correct is reducing as filtering is added, so next step has to be attempting a new regulator. I’ll keep you updated, but thanks for your advice thus far!