Hello team,
What is the minimum value of FLT pin when the output is high level?
Best regards,
Shotaro Sakai
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Hello team,
What is the minimum value of FLT pin when the output is high level?
Best regards,
Shotaro Sakai
Hi Shotaro-san,
FLT pin is tied to VCC internally and in the application as well, its pulled to Vcc externally with ~5K resistor - so the FLT pin voltage should be very close to VCC voltage.
Hi Sasikala-san,
Yes, I understood.
My customer is asking leak current on FET because of FLT = Vcc - (Ileak x 5kΩ). Do you have any opinion on this value?
Best regards,
Shotaro
Hi Shotaro-san,
If the FLT pin =GND, then the pull up current is 100uA as defined in the spec below.
But then if the FLT pin is high, then there is very minimal leakage current as the internal FET is open- the leakage current is very minimal. But then there is no spec defined for it.
Just curious, what is the customer system requirement of the leakage current?
Thanks
Sasi