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TLV62568A: PG pin logic status under device conditions

Bibin p s
Prodigy 55 points
Part Number: TLV62568A


We're employing the TLV62568AP buck regulator for the conversion of 5V to 1.8V. To achieve a logic LOW voltage at the PG pin of the regulator, our focus is on the condition highlighted in red.

Do we require additional device conditions, such as the status of the EN pin, to achieve a LOW PG (power good) signal under the input voltage condition of 1.4 V < VIN < VUVLO?.

  • 0
    TI__Mastermind 24570 points

    Hello Bibin,

    thanks for your interest in the TLV62568AP device.

    The "power good" condition is indicated by a logic high (pull-up when high Z).

    In normal operation this is only the case for the first case in Table 1 and all other conditions not present.

    As soon as one of the cases 2 ...4 occurs then the PG becomes logic low.

    The condition 1.4 V < VIN < VUVLO alone is sufficient to cause a logic low at the PG, regardless of EN.

    The last case in the table is highlighting that for VIN < 1.4V the logic is not operating and the open drain remains high Z.

    Best regards,

    Andreas.