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LMG1210EVM-012: LMG1210EVM-012

Part Number: LMG1210EVM-012
Other Parts Discussed in Thread: LMG1210,

Hi,

I'm a little bit confused while analyzing designs from TI.

I was facing an issue of huge power supply ripples while driving half bridge circuit using LMG1210 (Even with a 7.4V lipo battery as input). Then I come to know the solution as using ceramic decoupling. capacitors.

Reference: https://www.ti.com/lit/an/slta055/slta055.pdf?ts=1711689333008

For my application, I required Vin(max) 100V, Iout(max) 5A, Duty Cycle 2% to 98% (assuming 50%), fsw 1MHz, Vp(max) 100mV. The value of ceramic capacitance comes out to be 12.5uF as per the equation (1) of the reference given above.

Now the controversy starts with the development board of the same IC : LMG1210EVM-012 (https://www.ti.com/lit/ug/snvu572/snvu572.pdf?ts=1711691344661&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FLMG1210EVM-012%253FkeyMatch%253DLMG1210)

The development board is claiming upto 10A current, fsw 1MHz (Typical - Same as I'm using). But the development board is using (C3 -1uF*1  ||  C7,C10 - 0.22uF*2  ||   C4,C5,C12 - 0.022uF*3). That combined capacitors is valued 1.1144uF. That's not even close to 12.5uF as per the calculation of the given reference. Can anyone suggest me what valued ceramic capacitors should I use?