TPS6287B25: Questions for 2* TPS6287B25 in stack application

Andrew Su

Part Number: TPS6287B25

Dears,

i recommend TPS6287B25 to a leading optical module customer for 0.6V/32A application, and they are using TPS62876EVM-199 for stack application test, they still have a few questions as below, would you please help to share your comments?

1. When using the GUI to test TPS62876EVM-199 , the Phase shift of SYNC_OUT register is shown in gray and cannot be read or written (0x2. Bit4)

2. How TPS6287B25 achieve current sharing and voltage regulation in two-phase applications?

3. In 2-phase application , what are the DC and AC stress capacity between VIN and SW pin of the upper TPS6287B25?

4. Recommended range of external resistance and capacitance compensation for COMP pin in two-phase applications?

5. Recommended layout and wiring methods for analog ground and reference ground?

6. Is the chip industrial grade? Can the working temperature range of -40 to 125 degree meet the ten-year lifespan requirement?

thanks!

5 months ago

0 Chris Glaser 5 months ago

TI__Guru*** 145970 points

Hi Andrew,

1. Excel provided an updated GUI here: https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1346550/tps62876evm-199-configure-to-180-degree-shift/5131709#5131709 Did that work for you?

2. The stacked application is explained in the D/S section 8.3.17 and in this app note: https://www.ti.com/lit/an/slyt846/slyt846.pdf The devices regulate the voltage and current by sharing the COMP pin signal.

3. I don't understand the question. Can you rephrase it?

4. Equations are given in the D/S for calculating the compensation for any number of phases. The critical point is to know and include the total output capacitance on the output, including what is located at the load.

5. Follow the figure 9-40. Connect AGND directly to the thermal pad of each IC and tie the GNDs together through vias on the thermal GND pads, Cin, and Cout.

6. Yes, from table 6-3 the device can operate at a Tj from -40 to 125 C. It meets TI's standard quality metric of 100k power on hours.

Thanks,

Chris

0 Andrew Su 5 months ago in reply to Chris Glaser

TI__Intellectual 1010 points

dear Chris,

"In 2-phase application , what are the DC and AC stress capacity between VIN and SW pin of the upper TPS6287B25?", as far as my understanding, it should be referred to the Max stable & pulse voltage that the integrated high side MOS.

thanks a lot!

0 Chris Glaser 5 months ago in reply to Andrew Su

TI__Guru*** 145970 points

Hi Andrew,

There is no difference in the applied stress or the allowed stress in a 2-phase application. The allowable voltage ranges are shown in the abs max table. They have much margin, with a 3.3V input.

Thanks,

Chris

Power management

Power management forum

TPS6287B25: Questions for 2* TPS6287B25 in stack application