Hi
Could i have the learning data register address to capture the accuracy dv/i/dt data ,because after learning process ,the capacitance i got with big difference since devices process with the same environment and manufacture procedure. .
BR
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Hi
Could i have the learning data register address to capture the accuracy dv/i/dt data ,because after learning process ,the capacitance i got with big difference since devices process with the same environment and manufacture procedure. .
BR
After verified by test, the capacitance issue in learning process, that caused by the Super capacitors are not in full charge status ,even it shows 100% state of charge, the constant voltage charging situation should be last about 30min .