UCC28730: No startup pulse at the DRV pin when Cvdd reaches 21V.

Hi, update on this. The converter is working now. The regulation however is not great. At lower loads (5-10W for a 48V output), for a step change in output current, the output voltage oscillates a little and changes by about 10 % of the steady state value as I go from 5W to 10W. From 10W to 15W, the output is much more stable and regulated. Is there a way I can get better voltage regulation at lower loads as well? 

One more thing that I see is that as I increase the input voltage, the performance at low loads get worse and the converter needs a considerable amount of load connected to the output to be able to start up without hitting the overvoltage limit. Is there a way to fix this?

Hi Chinmay,

Thank you for reaching out with your query.

Good to know that the converter is working. The PSR controller are internally compensated so there is very little we can do to adjust the loop compensation. Ensure that the output capacitor is sized sufficiently to ensure transient stability of the converter.

For light load regulation, it is recommended to place a preload resistor to maintain regulation. It usually requires between 1-5mA of preload to prevent from hitting OVP and maintain regulation.

Regards,

Harish

I do have more than 5mA of preload connected. It still hits the OVP. My inductance however is planar, meaning it is not very tightly coupled. Do you think that can cause poor dynamic response?

Hi Chinmay, 

5mA should be more than enough to maintain good regulation.

I think coupling could be an issue here as with more leakage there can be issues with the Vs pin which might trigger OVP due to leakage reset time violation.

Thank you

Regards,

Harish

Okay makes sense, I measured the leakage from primary to secondary, and its 3% of the magnetizing inductance value. But from what you are saying here, I think what the control chip sees, is the leakage from aux to secondary, or secondary to auxiliary. Which leakage do you suggest on measuring? Should I short the secondary and measure on the auxiliary or should I short the aux and measure on the secondary? Also, should the primary be open or shorted for this measurement?

Regards

Chinmay

Hi Chinmay,

I think all windings other than the open where leakage is measured should be shorted.

Since UCC28730 is a primary side regulated controller, both the AUX and SEC has to be tightly coupled to each other in the transformer. In that way it ensure better regulation. You might want to check this. May a stack up like 1/2Np - Bias - Sec - 1/2Np should be ok.

3% should be ok for the leakage as a percent of magnetizing inductance. As a general rule, this is the value which is advised in many of our app notes.

Thank you

Regards,

Harish

Hi Harish,

Thank you for the explanation. I took all the measurements.

I got a new problem as I went to higher voltages. The Mosfet got shorted out, and as I started digging for waveforms at different nodes, I can see that when the capacitor at Vdd charges up, the gate voltage is not 0V. The gate to source voltage when the capacitor at Vdd is charging is around 3.5 V and then as the gate pulse is sent to the FET, the pulse goes all the way up to 14 V and then keeps oscillating between 0 and 14 V. This 3.5V is turning on the FET and I can see slight increase in the inductor current when the FET is supposed to be off.
Is this coupling between the drv pin voltage when the Cvdd charging normal behavior? Can you help me fix this?

Hi Chinmay,

Thank you for reaching out.

Is hard to tell what's going on. But do you have a 10k connected between the gate and source to prevent the charge build up at gate at turn off.

It could also be possible that switching noise could couple to the gate through the parasitic capacitance of MOSFET. You could try increasing the gate resistor and slow down switching transition times to see if this helps.

Regards,

Harish