Hi.
I'm using TPS40210 on my customer's board, but facing urgent problem.
Input: dicharging from 18V, Output: 20V, DIS/EN: floating
In below captured figure, C1 : Drain side of FET, C2: Cathod of DIODE, C4: VDD input
Input start discharging from 18V to fully discharged capacitor, but as below figure, input VDD voltage is held aroung 4.5V for long time, because that time is no load state.
Also this time, device is switch off by UVLO threthold, but after short time, switcher is working again for short time in discharging input voltage.
So I wonder why switcher is working again under UVLO threthold level, and there is any solution figure out this problem.
Pls advise me.