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LM5104: Clarification on pull-up/pull-down gate drive resistance

Reece Jahnke
Prodigy 10 points
Part Number: LM5104

Tool/software:

Hello! My coworker and I have been arguing about the properties of this chip. The datasheet notes that the maximum peak pull-up current is 1.6A, and peak pull-down current is 1.8A at 12V. 
I am assuming this means that the driver has an internal gate resistance of 12V/1.8A ~=6.66Ohms. My coworker believes there is no internal resistance and that I have to add a gate resistor to limit the drive current to the limits of the device. Can I get clarification of the internal gate resistance being present and around 6ohms in both directions?

  • +1
    TI__Genius 13175 points

    Hey Reece,

    Thank you for reaching out to TI regarding your question on the LM5104.

    Within the output stage, with the pull-up/pull-down FETs, the resistance seen is that of the Rds(on) of the output stage FETs. For example, that value can be found for the low-side pull-down FET using the V_OLL spec. R_OLL = 0.25V / 100mA = 2.5 Ohms. This is shown in Section 6.5 Electrical Characteristics in the datasheet as seen below.

    Here is an example of an output stage for a gate driver for reference.

    As for adding a gate resistor, we recommend adding a gate resistor on both the LO and HO traces in order to control the slew rate and drive current. The recommended sizing for this is 0-5 Ohms to begin your design and then that can be adjusted based on the FETs and the desired rise and fall times. Also, it is very common to see a turn-off Schottky diode and resistor in parallel with the gate resistor to allow for adjusting turn-off time independent of turn-on time.

    Let me know if you have any questions.

    Thank you,

    William Moore

  • 0 in reply to William Moore
    Prodigy 10 points

    With this, what limits the current to 1.6A and 1.8A? Seeing that those are typical currents, not Max/Min rated. Is it thermal properties of the Driving FETs? Would that not require the output gate resistance to be rated for the component?

  • 0 in reply to Reece Jahnke
    Prodigy 10 points

    In the configuration right now, I am using 2.7Ohms and there is no/limited overshoot and the rise/fall times are good. My coworker, however, is worried that I am operating outside of the driver chips designated range (12V/(2.7Ohms + LM5104 internal FET resistance)= 4.4A expected peak). Thanks in advance!

  • 0 in reply to Reece Jahnke
    TI__Expert 5923 points

    Hi,

    Due to the holiday in the US on 27 May 2024, many of the device experts are currently out of the office. When they return, they will look into this and provide a response. Please expect some delay accordingly.

    Thanks,
    Pratik

  • +1 in reply to Pratik Adibatla
    TI__Genius 13175 points

    Hey Reece,

    A 2.7Ohm gate resistor should be acceptable and seems to be operating as expected.

    Here is a Tech Note discussing peak currents of gate drivers:
    Understanding and Comparing Peak Current Capability of Gate Drivers

    The best way to limit gate drive current is by sizing the gate resistor. In many applications the gate resistance can be 0 Ohms for fast rise and fall times. This operation is not of concern for the driver as long as temperature rise and junction temperature stay within the datasheet specifications. 

    Thermal considerations can be calculated using the following FAQ:

    [FAQ] UCC27282: How to Calculate the Max Operating Frequency of a Half-bridge Gate Driver

    The driver output stage will self limit the gate driver peak current based on internal device characteristics and the supply/drive voltage. The driver will not be damaged with excessive output current even with a 0 Ohm gate resistor. The only concern would be gate drive losses or power dissipation in the IC and temperature rise.

    Let me know if you have any further questions.

    Thank you,

    William Moore