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TPSM365R6: Control-loop compensation

Emiko Kitta
Prodigy 30 points
Part Number: TPSM365R6

Tool/software:

Hi Ti team,

I don't have much experience on DCDC that doesn't have control-loop compensation tuning.

 

In TPSM365R6 datasheet it mentions

"Control-loop compensation is not required, reducing design time and external component count" in 9.1 overview.

Does this mean that this IC will assure that there will be no oscillation?

Or does this mean that this IC can't do control-loop compensation tuning but there are ways to tune to tune when oscillation occurs?

 

I have done Webench simulation and at full load the Phase Margin(67deg) and Gain Margin(-28dB) is good.

I'm just not sure about the lower loads.

Please let me know if there are any way to avoid oscillation in these type of DCDC.

Best Regards,

Emiko

  • +1
    TI__Mastermind 18685 points

    Hi Emiko,

    With an internally compensated device, following all of the recommendations in the Applications Section of the datasheet should result in a stable design. In Webench, at the bottom of the schematic page, there should be sliders that allow you to change in input and output parameters. Webench can then estimate phase margin and gain margin at those parameters if you are interested in looking at the lower loads. Here is what to look for in Webench:

    If you see oscillations in your design, generally adjustments to the output capacitance will help with stability for a module. You can also experiment with a feedforward capacitance if it is needed. 

    Best regards,

    Ridge