• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 145 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCC15240-Q1: Topic of a 2-Layers IMS mounting

Lionel MAZET
Prodigy 20 points
Part Number: UCC15240-Q1
Other Parts Discussed in Thread: UCC21732-Q1, UCC14240EVM-052

Tool/software:

Dear E2E Support Team,

I am designing the DC/DC insulated power supply of the UCC21732-Q1 SiC Driver with the UCC15240-Q1 ins. DC/DC.

For cost and thermal reasons, we plan to layout the SiC driver components with the power SC on a 2-Layer IMS:

- the dielectric layers are 100µm thick.

- no part on the bottom side, because there is no secondary side

- the 2 layers will be linked with microvias.

So my questions:

1) Does the UCC15240-Q1 compatible with the metal core mounting? i.e. does the insulation cupling method (capacitive or inductive) will lead to losses or EMC issues ?

2) What are the recommandations for the components placement: priorities against decoupling capacitors and feedback resistors.

Thank you in advance for your analysis.

  • 0
    TI__Mastermind 27515 points

    Please follow the component placement and PCB design guidelines shown in section 12.6 of the UCC15240-Q1 data sheet.

    Regards,

    Steve

  • 0 in reply to Steven Mappus1
    Prodigy 20 points

    Dear Steven,

    Thank you for your answer.

    It seems to me that this overlined extract give this guideline for thermal concerns.

    In our case, the IMS board will have at least a thermal conductivity of 5 W/m.K (ASTM D5470 method). This is at least 10 times better than a FR4 (according to IPC 2152, which indicate a TCz around 0,35 W/m.K). 

    Moreover, the insulator has a dielectric withstand voltage of 5.0 kV (as IPC-TM-650 2.5.6.2).

    Despite I already saw that the layout in the UCC14240EVM-052 that indicate a clearance under the part, I would like to clarify the IMS possible issues.

    Thank you again

  • +1 in reply to Lionel MAZET
    TI__Mastermind 27515 points

    TI has not evaluated UCC15240 performance applied to IMS PCB. Also, IMS seems not a preferred method by any of the customer's I have engaged with (maybe higher cost?). When you introduce metal beneath the IC, there is the potential for high frequency noise coupling into the copper pour/land/IMS material. This is especially true if the metal is floating and probably best to reference the metal to some DC or GND plane.

    Regards,

    Steve