TPS53659: DCAP+ 3rd Generation PWM controller

Tool/software:

Hello All,

I am designing a 0.8V, 82.5 A core voltage for a high speed FPGA. We are using the TPS53659. We have an NDA with TI. I have searched the internet looking for some information about DCAP+ control algorithm and implementation. The only document I found was SLVA867,D-CAP+ Control for Multiphase, Step-Down Voltage Regulators for Powering Microprocessors. This tech doc only explains generation 2, but not generation 3. The TPS53659 data sheet shows a similar but different block diagram. 

Is there any information or block diagram that explains how DCAP+ third generation works and how it is different from generation 2?

Do you have any PSPICE average or time-domain models available for the TPS53659 PWM IC?

Thanks for you help,

V/r,

Chuck Sampson