BQ24295: BATFET, VINDPM clarifications

Hi Emmanuel, 

Please see my comments below. 

1) Please refer to Quiescent Currents specifications listed on datasheet page 7. With BATFET disabled maximum Iq is 20 µA. Yes when charge is complete SYS continues to be maintained above VBAT. 

2) A new power source detection will occur if VBUS falls below V_BADSRC (3.8V typical). VBUS falling below VINDPM will stop the converter, but does not result in new power source qualification and source type detection. 

3) This case would require additional information, but device is not expected to get stuck in input source detection. If input does not match any adapter types it will be unknown/non-standard adapter.

Are you initially setting DPDM_EN = 1? Please keep in mind input current is limited when VBUS is near VINDPM in an effort to keep buck converter active. 

4) The only methods to exit shipping mode are listed in datasheet section 8.3.1.2.2. Considering QON pin is floating in your system the only methods to turn on BATFET are register write to REG07[5] or REG01[7] or an adapter plug in. 

5) There should not be any prerequisite. To investigate further please show a register dump before and after setting REG01[7] = 1. It will not start a new power source detection assuming VBUS is not removed. 

Best Regards,

Garrett

Hi Garrett,

Thanks for this, here are more details:

1)Ok for VSYS above VBAT

2 and 3) I've done more tries and have a better understanding. Let me try to explain.

*In my first try*, there is a confusion between DPM bit REG08[3], that is not related to DPDM detection, but VINDPM (limitation in input due to voltage or current) and true DPDM that should be monitored by reading DPDM_EN (REG07[7]).
So I have some DPM that occurs, with voltage level that is near VINDPM threshold - but that's only a coincidence, Changing load point, this DPM threashold will change (higher or lower) clearly showing that's in not related to VINDPM threshold but related to IIN DPM limitation.

In real application (not in my tries) we intially set DPDM_EN at startup. In my memory it was to recover from bad power source detection (for example when there is some glitch during power socket insertion, specifically during product testing).

==>Is there any drawback to force such DPDM ?

I'm also vastly suspecting that I can have such rare unwanted event of new DPDM during some extern power event for example line small glitch power outage of  a few ms to hundred ms. So VBUS must fall below 3.8V during these event and being unstable during detection. [I've not tired to reproduce this at the moment].

So let say my system is running. It's current consumption is about 110mA to 150mA on VSYS voltage. This current is not highly  dependant of VSYS voltage (but remains a bit) as main power is LDO to 3.3V. Only one part (modem) use a PMIC that will depend of input voltage.

Input current is fully dependant of VSYS voltage as buck will draw current depending on power.

VSYS is dependant on VBAT, so with a high VBAT (let say 4.0V), I will drain more current on VBUS. In case of a DPDM, this current will be limited to 100mA during detection, limiting then stopping battery charge, and then lowering VSYS voltage. In turn power consumption will lower and some stable point will be found. But possibily not instantly.

==>Will DPDM be disturbed by the fact it enter DPM (potentially dynamically) during DPDM

I will reply on other points a bit later.

Hi Emmanuel, 

Thank you for the detailed explanation. I am checking on it and will get back to you in the next couple days. 

Best Regards,

Garrett  

Thanks Garett. I also add a few more question related to "faults"

Charger faults:REG09 [4-5] 

01:input fault (OVP or bad source).
02:thermal shutdown.

When we see one of these 2 faults, converter stop. After input goes back to good value or IC cool down, do we need to reset the fault to restart converter ? do we need to disable/enable charge to reactivate battery charge ?

03:charge timer expiration here we must disable/enable charge to restart it

BATOVP REG09 [3]

When we see this fault, charge is disabled (REG01[4] goes back to 0 ?), we must reenable it when BATOVP disappear to restart charge ?

Hello Emmanuel,

We are still looking into this and will respond after verifying with others in the team.

Sincerely,

Wyatt Keller

Garett,

Thanks for all of this.

Just 2 lasts questions:

1)
>>03:charge timer expiration here we must disable/enable charge to restart it
>Correct, datasheet section 8.3.3.5 lists 4 actions that can be used to restart charge after safety timer expiration. 

When timer expire, charge is stopped.
==>Does REG01[4] CHG_CONFIG is modified internally at this time ? I had a doubt, but it seems that this bit remains to 1, and I had to set to 0 then to 1

2)Specific case:

My battery is at 3.2V
Charge battery, 102.4mA
Input limitation: 100mA (@5V)
VSYSMIN:3.7V
If I have no load on VSYS, charge will be at 100mA

A)If my load on VSYS is increasing, charge current will reduce, down to 0mA. In fact we will start to have some low current out of battery (8µA in my case), this is the "quiescent" always present

B)If my load is increasing more, my VSYS voltage will start to lower. It seems that this quiescent is increasing (12 to 15µA).
==>Is this expected ? it remains limited by the "battery discharge current specification" ?
What I'm searching for is something in range of "1mA" leak (at room temperature) in this kind of very specific case (not general case) we see of one product that ended with a battery issue (I can't fully exclude that DPM is also in progress - but not permanently, juste during load transient for exmaple)

C)With more load increase, VSYS will reach 3.2V and at this time, we will enter supplement mode, were current drawn on battery will increase to the needed value for supplying VSYS

When I reach the charge timer expiration, it seems that my 12/15µA load remains (in situation B) ? that seems to be part of quiescent, true ?

Regards,

Emmanuel