This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPS544B20: the slew rate of input voltage to CNTL pin

Part Number: TPS544B20

Tool/software:

Hi team,

May I know the minimum required slew rate of input voltage to CNTL pin? My customer has been evaluating the TPS544B20 by TPS544B20EVM-634. The output voltage rises like saw-like as below when the slew rate of input voltage to CNTL pin is slow.

Second, my customer makes the slew rate of input voltage to CNTL pin slower, the output voltage rises unstable as below.

Third, my customer makes the slew rate of input voltage to CNTL pin faster, the output voltage rises stably as below.

Best regards,

Shunsuke Yamamoto

  •  

    While we do not explicitly define a minimum slew-rate on the CNTRL, it is intended as a digital input and does not have a large amount of hysteresis, making it noise sensitive near it's 1.2V threshold level.

    A slew-rate of 10V/ms, along with limiting noise to less than 100mV pk-pk when between 0.8V and 2V should be sufficient to avoid repeatedly triggering the CNTRL pin.

    Does the customer have a need to ramp the at approximately 0.75V/s as shown in the first graph?