UCC28700EVM-068: Output is unstable

Part Number: UCC28700EVM-068

Tool/software:

Hi ,

I am using UCC28700EVM-068 for my application to generate 24V at the output. My requirements are 

AC Input Voltage: 120VAC +/- 10%

AC frequency : 60 Hz

Output Voltage: 24 V +/- 5%

Transformer used for my application: 750343068 (Wurth Elektronik)

I have attached the Excel calculator & Schematics for your reference.SLUC408B_Modified for 24V Output.xlsx 

In the attached webench design file for 24V, I have used some of the components with different values.  WBDesign11.pdf

Rlc = 4.64kohms instead of 5.49 Kohms

Rcs = 665 mOhms instead of 560 mohms

Rt1  = Rt2 = Rt3 = 1.24 Meg ohms instead of 1.32 Meg ohms

Cdd = 4.7uF instead of 1uF

Dz is unused for VDD pin of IC

Kindly add your comments for the above component values.

Problem statement : I am not able to get the 24 V output during my input range but instead I am able to see an output of 27V @ 92 to 97 VAC.

For rest of the input AC range > 97VAC , Output voltage is ~ 2.1V with rippler of 2V.

Since I am new to this flyback topology, Help me understand what is the issue in my circuit & Let me know if anything to be changed. ?

Appreciate your support at the earliest !

Regards,

Rajesh K

  • Hi Rajesh,

    Thank you for reaching out.

    The following is a 24V/1A reference which you could use for reference.

    https://www.ti.com/tool/PMP10468

     Rcs should be lower than the recommended value. Rlc and Rcs is advisible to follow as per datasheet as this will lead to power limit and can cause output voltage to drop early hitting CC limit. I think Lm could be higher in your case but other calculations looks ok to me.

    Regards,

    Harish

  • Hi Harish,

    Thanks for your confirmation on calculation . Still I am facing difficulty in getting the Expected output i.e 24V. Output wavefrom is shown below.

    Vout - Output Voltage

    Vdd - voltage at Vdd pin of IC

    I am seeing the voltage spikes across the primary winding (Vpy- Max: 557V) & Secondary winding (Vsy - Max: 17.4V) & Auxiliary winding (Vay) at the time of FET turn off initiation. I have tried R2CD snubber with (Cc = 1nF , Rc = 20k, Rs = 464 ohm & D= MURS160-13-F), still the peak voltage stress on primary winding does not change.

    Attached the circuit which i used for this testing for your reference.

    Appreciate your help and suggestion here to resolve this.

    Regards,

    Rajesh K

  • Hi Rajesh,

    Thank you for reaching out.

    Rs of 464ohms seems very high. It is only going to increase the voltage spike on the switch node. Generally it is between 10-30ohms.Also clamp capacitor and resistor selection depends a lot on the leakage inductor value. Ideally choosing a lower clamp resistor value like 20k will increase the dissipation on the snubber but will help reduce the clamp voltage (You might want to check decreasing the clamp resistor to contain thr Vds spike, but 20k itself seems on the lower side). The MUSR160 diode should be fine for this application. From the waveforms it looks like a stability issue. Can you increase the output capacitance? Please share the excel calculator because this controller stability will depend a lot on the choice of Lm and Rcs.

    Regards,

    Harish