UCD3138128: TIDA-00653, About CBC Setting

Parrish,

127 is the max value of ACOMP_B_THRESH register. 2.5V is the max ADC input voltage. 1.25V is the clamping voltage of REF1112AIDBZT, which is the op amp (U5A) IN+ pin voltage. In another word, offset of the current. 

The sampling shunt resistor is 1mohm. The op amp amplification factor is 26.1 so 26.1*0.001 ~=0.0269 (the last digit is off probably due to non-ideal component value). 

If the max current changes in the future, you'd want to adjust the current shunt resistor value to make sure the reading is still within ADC range.

You can only use ADC2, 3, 4, 6 ,7, 13 for CBC. But ADC6 is used to sense the 48V bus. You will need to use other ADC to achieve the feature.

You code is not correct. You are connecting AD-07 by your code. You don't need to change the code but you need to change the schematics to reassign the pins.

Dear Ning,

Sorry, I didn't explain clearly.

We are referencing the TIDA-00653 to design a 48V to 48V bidirectional DCDC converter, so I will need to understand the original firmware design to modify the corresponding content accordingly.

Currently, to use the iShare function on the device, I've changed ADC13 to ADC06, and the original ADC06 has been moved to ADC05.

Since iShare uses AD02, I have also changed the original ADC02 to ADC01. Please refer to the diagram below.

Given this configuration change, is the manual adjustment I made correct?

ACOMP_F_REF_SEL = 0  (this means default  AD06? or AD07?)

Dear Ning,

Continuing from the above question, how should I modify it to properly configure AD06?

Below is my "init_CBC" code, and compared to the original code, I have only modified the "Phase 4 CBC" settings.

Dear Ning,

Yes, that's what I meant, thank you.

Additionally, I have another question:

Since the "init_CBC()" function is responsible for the initial configuration of CBC, I noticed that at the end of each phase, "CBC_MAX_COUNT," "AB_MAX_COUNT," and "ALL_FAULT_EN" are set.

Why isn't "CBC_FAULT_EN" set? Under what circumstances would "CBC_FAULT_EN" be needed?

Dpwm0Regs.DPWMFLTCTRL.bit.CBC_MAX_COUNT = 15;
Dpwm0Regs.DPWMFLTCTRL.bit.AB_MAX_COUNT = 1;
Dpwm0Regs.DPWMFLTCTRL.bit.ALL_FAULT_EN = 1;

Good question. I don't know why CBC_MAX_COUNT = 15 and CBC_FAULT_EN is not set in the current firmware. It was developed over 8 years ago.

Here is how CBC_FAULT_EN work: if the number of consecutive CBC events exceeds the CBC_MAX_COUNT, then the PWM signal will be disabled until reset. Normally, a user can set CBC_FAULT_EN = 1 to prevent PWM from switching after a true over current situation which often occurs across multiple cycles.

Dear Ning,

Would you recommend that I add CBC_FAULT_EN=1 in the code?

If it is set simultaneously with ALL_FAULT_EN, would there be any conflict?

Additionally, if CBC_FAULT is triggered and DPWMA and DPWMB are disabled, what settings are required to restart DPWM?

Thank you.

Parrish,

Please read the TRM like section 6.8 and you will find a lot of information.

For example, CBC_FAULT_EN for CLIM/CBC, and ALL_FAULT_EN for the other 3.

It is up to you to decide if you want to enable PWM disable feature due to CBC count over limit. I'd recommend to implement the fault handling procedure as well in addition to setting CBC_FAULT_EN = 1. In another word, what you'd like the system to react after the fault is inserted.

Dear Ning,

I briefly looked at the information you provided and have a thought:

In the following code, I plan to add a check for the "DPWMFLTSTAT.bit.FLT_CBC" status either periodically or within the main loop. If it is triggered, I will first fully disable the state, and then proceed to restart the "dpwm." Is that the correct approach?

void Check_flag(void)
{
    if (Dpwm0Regs.DPWMFLTSTAT.bit.FLT_CBC)
    {
        //CBC FAULT Trigger
        global_disable();
    
        Dpwm0Regs.DPWMCTRL0.bit.PWM_EN = 0;
        Dpwm1Regs.DPWMCTRL0.bit.PWM_EN = 0;
        Dpwm2Regs.DPWMCTRL0.bit.PWM_EN = 0;
        Dpwm3Regs.DPWMCTRL0.bit.PWM_EN = 0;
    }
}

void resume_enable_dpwm(void)
{
    //another enable dpwm
    global_enable();
    Dpwm0Regs.DPWMCTRL0.bit.PWM_EN = 1;
    Dpwm1Regs.DPWMCTRL0.bit.PWM_EN = 1;
    Dpwm2Regs.DPWMCTRL0.bit.PWM_EN = 1;
    Dpwm3Regs.DPWMCTRL0.bit.PWM_EN = 1;
}

Parrish,

I highly recommend NOT to implement the way you mentioned. Please use interrupt module to handle the fault so the MCU resources is not used.

Also, note that the fault bits are clear on read so you cannot constantly checking on them.

Please check the file "standard_interrupt.c" for examples of using interrupt handler.

Dear Ning,

Understood, so if I place a similar handling routine within the "standard_interrupt" function, and control the corresponding behavior there, that should work, correct?

From what I understand, this interrupt is set to trigger based on PWM2 in the DCDC program, which means it's a periodically triggered interrupt, right?

Dear Ning,

Thank you very much for your assistance. I will create a new post if I have further questions.

Dear Ning,

Sorry, one last question:

I noticed that the FAULT-related settings in the DCDC code are all commented out, so it's possible that this program doesn't handle FAULT events. If I remove the FAULT EN and MAX_COUNT settings in the "init_CBC()" function, what would happen?

(This is under the condition where only the pin configuration and CBC activation criteria are set.)

like this:

init_fault ( DCDC code):