Other Parts Discussed in Thread: TINA-TI,
Tool/software:
Hi TI,
I have a application would be use back to back common source NMOS.
I would like to use 5V to turn on the back to back NMOS and without 5V the 3.3V would not leak to the Drain2 signal.Does the circuit make sense with that function?
Besides,as I know the NMOS turn on condition is VGS>Vth, but when NMOS is being off, should it be floating in both source pin?
If it does, how could it work?It may a elementary knowlege but confused me for a long time, I would be grateful if you could help me to get it clearfy.