• State Resolved
  • Locked Locked
  • Replies 9 replies
  • Answers 1 answer
  • Subscribers 66 subscribers
  • Views 317 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[FAQ] Use BQ25700A for Supercap charger

Hale Konopka
Prodigy 70 points
Part Number: BQ25700A
Other Parts Discussed in Thread: BQ25730EVM

Tool/software:

Hello,

We've used the BQ257x family of parts in some of our other products using batteries, but I'd now like to use it with a supercapacitor instead. The features which I particularly like about this family is

  1. Input current limiting - Power will be sourced from a USB-C PD supply, where the current/voltage will be negotiated
  2. Battery (supercap) current limiting - Current going into the supercaps can be limited for a safe temp rise
  3. Battey (supercap) supplement mode - When the external supply is disconnected, the supercap can immediately supplement and power the system from its functional voltage range of ~6V to 10V

In my application, I want the supercap to fully charge before the VSYS load is connected, and in my testing I've been able to demonstrate my desired behavior with the following register configurations

  1. Charge Option 0 > EN_LDO = 0
  2. Charge Current Register = 1024mA
  3. Charge Voltage Register = 10000mV
  4. Input Current Limit= 3000mA
  5. Minimum System Voltage = 0mV

This successfully charges my supercap from 0V to 10V, after which VSYS=10V and I can use it to power my system. My question is that according to the datasheet, Minimum System Voltage = 0mV is not supposed to be valid (see image below). Can someone from TI answer whether this Min System Voltage behavior is expected? If it is not expected, can it be captured in the errata as a valid input because I would like to use it and think it would be a useful use-case? Also is there any risk of parts in the field, or planned silicon changes causing this behavior to change?

Thanks

Hale

  • 0
    TI__Mastermind 26685 points

    Hi Hale,

    It is a smart idea to use BQ25700A for supercap charger. The key is to disable LDO mode (EN_LDO=0), thus allowing full charge current to the supercap. The min system voltage regulation also relies on LDO mode. The min system register setting is not important when LDO mode is disabled. The charger will ignore a zero value in the min system voltage register.

    See datasheet 8.6.5.  "The charger provides minimum system voltage range from 1.024 V to 16.128 V, with 256-mV step resolution. Any write below 1.024 V or above 16.128 V is ignored."

    I don't see any risk because this is a known configuration. This is not an errata, it is one of the many possible ways to use this charger, no silicon change is expected.

    Regards,

    Tiger

  • 0 in reply to Tiger Zhou
    Prodigy 70 points

    Hi Tiger,

    Thank you for your quick reply here. That is very helpful to know. Is the Min Sys Voltage setting completely ignored then when EN_LDO=0? If it isn't then I thought this might be an issue because the supercap starts from 0V which is below whatever is set in that Min Sys Voltage register. I was having trouble getting the charge to start unless I set Min System Voltage= 0V (outside the valid range), is there another register setting which I am missing?

    Thanks

    Hale

  • 0 in reply to Hale Konopka
    TI__Mastermind 20200 points

    Hello Hale,

    Tiger is out of office today and will return on Monday, Thank tou for your understanding.

    Best Regards,

    Christian

  • 0 in reply to Christian Moyer
    TI__Mastermind 26685 points

    HI, Hale,

    I am not sure what trouble you encountered with min system voltage. See below an example of SuperCAP charging with EN_LDO=0. 

    I keep the min system voltage =3.6V as default, ICHG=1A, Max charge voltage =4.2V. 

    supercap-4.2V-1A-charging.txt 
    * Created: Mon Sep 23 14:15:38 CDT 2024
*
* Format: Register Name  tab Character,\t  Hexadecimal register value.
* Device: bq25700A
* BQZ Container: Charger_1_00-bq25700A.bqz
*
Charge Option 0	020A
Charge Current Register	0400
Charge Voltage Register	1060
OTG Voltage Register	0000
OTG Current Register	0000
Input Voltage Register	1500
Minimum System Voltage	0E00
Input Current Register	4100
Charge Status Register	A000
Prochot Status Register	0000
Input Current Limit In Use	4100
VBUS and PSYS Voltage Read Back	6800
Charge and Discharge Current Read Back	0000
Input Current and CMPIN Voltage Read Back	0000
System and Battery Voltage Read Back	0000
Manufacture ID Read Back	0040
Device ID Read Back	0079
Charge Option 1	0210
Charge Option 2	02B7
Charge Option 3	0000
Prochot Option 0	4A54
Prochot Option 1	8120
ADC Option	2000

    Due to PFET voltage drop, please pay attention to the PFET thermal dissipation. 

    Regards,

    Tiger

  • 0 in reply to Hale Konopka
    TI__Mastermind 26685 points
    Hale Konopka said:
    Is the Min Sys Voltage setting completely ignored then when EN_LDO=0?

    When charging is OFF,  the BATFET is OFF, the minimum system voltage is still effective. 

    When charging is enabled and EN_LDO=0, the system voltage will drop below the min system voltage setting by pulling down the BATDRV voltage, however, due to the PFET threshold, the system voltage is about 2V when VBAT=0. Full ICHG current is available to charge the super cap. See below test waveform. 

    Regards,

    Tiger

  • 0 in reply to Tiger Zhou
    Prodigy 70 points

    Hi Tiger,

    Thank you for sharing your exact test setup and measured waveform. This is very helpful to see that we are observing the same thing.

    My confusion is that you set Min System Voltage= 3.6V, yet when you start charging the voltage droops to 2V so in fact VSYS has fallen below this minimum system voltage. This works great for my application (I don't care about Min System Voltage when the supercapacitor bank is at 0V and begins charging, only when it reaches 6V), but this doesn't seem like the correct behavior given the definition:

    8.4.1.1 System Voltage Regulation with Narrow VDC Architecture

    The device employs Narrow VDC architecture (NVDC) with BATFET separating the system from the battery. The minimum system voltage is set by VSYS_MIN register REG0x0D/0C(). Even with a depleted battery, the system is regulated above the minimum system voltage.

    Is this not contradictory?

    Also are you testing on the BQ25730EVM?

    Thanks

    Hale

  • +1 in reply to Hale Konopka
    TI__Mastermind 26685 points
    Hale Konopka said:

    The device employs Narrow VDC architecture (NVDC) with BATFET separating the system from the battery. The minimum system voltage is set by VSYS_MIN register REG0x0D/0C(). Even with a depleted battery, the system is regulated above the minimum system voltage.

    To operate above min system voltage, it requires the BATFET in LDO mode to support the voltage difference. When LDO mode is disabled, the VSYS will drive to the VBAT as close as possible. 

    I tested on BQ25700AEVM. 

    Regards,

    Tiger

  • 0 in reply to Tiger Zhou
    Prodigy 70 points

    Hi Tiger,

    Thank you for clarifying, that answers my question perfectly. Glad to learn this is the expected behavior and this will work in our system.

  • 0 in reply to Hale Konopka
    TI__Mastermind 26685 points

    Glad to know it works.