LM5185-Q1: High secondary voltage in no-load condition.

Hello Harun,

Can you please fill out the calculator spreadsheet with your detailed spec so we can check your design against the recomended values.

Thanks in advance.

https://www.ti.com/tool/download/LM5185-DESIGN-CALC

David.

Hello David,

Thank you for your response.

I have filled out the calculator spreadsheet  and shared it via the following Google Drive link: GDrive Link

Additionally, I have included a layout plan for both the primary and secondary sides.

Thanks again for your assistance.

Best regards,
Harun

Can you post here the calculator as I am unable to access the file sharing site posted, thanks.

David.

Okay, sorry about the delay.

Excel:

5226.LM5185-DESIGN-CALC.xlsx

Layout:

Harun.

Thanks, Huran,

Do you have the specification sheet of the transformer used?

In particular, what is the leakage inductance specification on your transformer.  this needs to be kept relatively low.  it maybe helpful to reduce leakage inductance by increasing GAP length to a distance that will give you the recommended ~12.8uH.  if you are unable to do this, perhaps increasing the snubber capacitor to 120pF.  I recommend you implement both suggestions it you can.

Thanks.

David.

Thanks.

The transformer I’m using doesn’t have a specification sheet at the moment as it is custom-made. It consists of PCB traces placed between two ferrite cores, as shown in the images attached. The turns ratio is 1:1:1, with 1.5 turns on each winding, and there is no air gap in the design. 

Core (2 pcs together):

Al: 9600 +-25% (No air gap)

Given this structure, I have not(couldn't) measured the exact leakage inductance but I will look into increasing the snubber capacitor next day.

Harun

Hello Harun,

A flyback transformer requires an Air gap, without one you will find that the transformer will quickly saturate. 

See links below for more information.  Also suggest contacting transformer manufacturer for more guidance here.

https://www.ti.com/download/trng/docs/seminar/Topic4LD.pdf

https://www.ti.com/lit/ml/slup127/slup127.pdf

Hope this helps,

David. 

Hello David,

Thanks.

I understand the importance of an air gap in flyback transformers, and I appreciate your guidance. In this prototype, however, I wanted to experiment with a different transformer design. Based on my calculations, with a 4A peak primary current and 1.5 turns, the magnetic flux density reaches ~0.38T, which is below the saturation level of 0.45T for the core material I’m using (3C95), corresponding to Hc=157A/m. The idea was to leverage the core's intrinsic storage capability with fewer turns (PCB traces).


In other words, I placed my bet on this highlighted section in the second document you sent (page 5-3).

I also have a version of the same design with a total air gap of 0.03mm that I have tested a week ago. It has a primary inductance of 8µH, though I couldn’t measure the leakage. I’m still encountering the same issue with high no-load secondary voltages, which is why I’ve been using the version without the air gap. I can continue with that prototype as well.

Increasing the snubber capacitor

Based on your recommendation, I increased the value of the snubber capacitor. Unfortunately, I didn't have a 120pF capacitor, so I used the closest one, 220pF. I applied a 24V DC input and observed that the output was 18.2V. In contrast, I measured the input current to be 2-3mA.

I also conducted thermal tests again:

No load(5 min.)

12W (%80 rated power) for 5 min:

I believe there is an improvement in the no-load condition since there is a drop towards 15V. But I think if I continue increasing the snubber capacitor, the snubber resistor's dissipation will increase as it gets closer to the rated power.

Regards,

Harun.

Hello Harun,

Understood, as long as the core material will allow for energy storage due to its properties, I am not going to dispute that there are cores with distributed GAPs negating the need to have a physical GAP, I am assuming you have this type of iron power core? 

However, making Lrpim twice as high as the recommended, is going to increase the leakage inductance by this amount and may contribute to the no load regulation.  in other words, decreasing Lrpim, will decrease Lleakage proportionally and help you also, a little.

You are correct, increasing Csnub will increase losses in Rsnub, similar to preloading, in a sense...

I would definitely double check your core material and make sure your calculations are correct.  L*I/Ae*N = B and make sure the core can be magnetized to the level intended without core saturation.

Lastly, if you have absolutely no load on the output, the voltage will creep up somewhat, this is something you will have to deal with.  Again, reducing leakage may help a little here?  

PS: you can measure the leakage inductance by shorting out the secondaries and measuring the primary inductance on an LCR bridge.

The expert in this device is back today and he may chime in with some recommendations as I may have over looked something herein

David

Hope this helps.

David.

Thank you David to cover me when I was out of office. 

Hi Harun,

Here allow me to add my comments in addition to what have been discussed. Please replace the TVS at D7 and D8 with  ~16 to 17V Zener diode.   Then your output voltage will be well clamped.  TVS is not a right selection there. 

Hope this clarifies. 

Regards,

Youhao

Hello David,

A-) As mentioned earlier, the core material I'm using is a ferrite type called 3C95. I’ve attached the document for your reference.
3C953.pdf

I interpret the fact that the transformer can transfer high power without saturating as an indication that it should be able to handle low power transfer easily. But this is most likely wrong, because the switching behavior changes at low power. Interestingly, I might only be saturating the core at low power. The same applies to the version with a 0.03mm air gap. Maybe I should increase the number of turns and add a longer air gap.

B-) Regarding the no-load condition, it's not entirely without load. As shown in the schematic, there are 10kΩ dummy loads on each output, meaning there is a small load. Perhaps I need to lower the value of the dummy load to increase the constant power consumption slightly. Currently, if I modify the dummy loads to consume a minimum of 0.5W across both outputs, the problem is resolved. However, this is not an ideal approach.

Here's the thing: when I short the secondaries and read the primary, the LCR meter gives me a result of 0.2 µH as with every value it can't read. The most sensitive measurement range of the LCR meter is 0-200 µH, so while it shows 0.2 µH, it could also be 0.3 µH or 0.1 µH.

Best regards,
Harun

Hi Youhao,

Thanks for your response.

I will do this tomorrow. So, our goal is to clamp this rising voltage at 16V and accept 16V for no-load conditions, correct?

Regards

Harun

Hi Harun,

This is just related the required min load:  the IC will always switch even there is no load (fsw can be 11kHz typical but can be up to 15kHz as a safe estimate), and the primary peak current will always be 20% or higher of the peak limit (in your circuit it will be 0.8A).  This makes the following amount of power:

0.5 * (0.8A*1.1)^2 * (24.3uH*1.1) * 15kHz = 0.155W.  Where I estimated 10% Ipeak current tolerance, and 10% inductance tolerance, for the worst case estimate.

And, this power must be consumed or additional charge will be accumulated in Cout to raise Vout. Your 2x 10kOhm resistor just consumes 2 * 15V^2 /10k = 0.045W, and this explains your Vout rise.  You should reduce the resistor to 3.01k or even 2k, to avoid charging up Cout higher than the Vout setting point under no load. 

You may use the combination of a smaller dummy load resistor (like 10k in your design) and the 6-7V Zener, but note that the Zener voltage usually has ~ 5%, and the Zener voltages are not fine granulated. 

If you want to achieve 16Vmax, please reduce the dummy load resistors, and you can save the Zeners.

Regards,

Youhao

Thank you so much for the detailed explanation. I will run some tests on the next business day and get back to you with the results.

In the meantime, I wanted to mention that I’ve already replaced the original 22pF snubber capacitance with 220pF, which helped bring down the output voltage under no-load conditions. Do you have any recommendations for the snubber capacitance on the primary side as well?

Best regards,
harun

Please share the SW waveform without the RC snubber, and zoom in the ringing.

Note taken. I will send the image the following day.

Okay.  Also a reminder if you want to cooperate more:  Please just post with a question or new technical info, because each of your post will trigger the e2e server clock and we must respond in 24 hours.  Some courtesy msgs like above can be saved to help us from being busy in responding to those courtesy post :-).   I am looking forward to your waveforms tomorrow.

Regards,

Youhao

Alright, I did the following in order:

1-) I removed the 220pF snubber capacitor that I had added last from the board. This way, the primary-side snubber circuit was eliminated.

2-) I removed the 18V TVS diodes on the secondary side and replaced them with 1206 2K resistors in their footprints.

3-) I removed the 0603 10K resistors on the secondary side and replaced them with small, fragile SOD 323 16V 0.2W Zener diodes that I had on hand and fit the footprint.

I applied 24V DC and obtained +15.19V and -15.19V outputs with an input current of 11-12mA, which I think is great. Of course, wasting 0.22W of power isn't ideal :)

Then I prepared a load that would consume a total of 9.8W. I applied 24V DC and obtained +15.17V and -15.18V outputs with an input current of 528-540mA.

As for the SW visuals (SW-GND) or (Drain of the MOSFET to GND): As I mentioned, there is no snubber on the primary side at the moment.

NO-LOAD (Except 2Ks) + No Snubber

Here’s the image with no load: (Device: AA TECH ADS-3072B)

Thermal images are a must (for 5 min):

9.8W + No Snubber

No ringing? I must have done something wrong. I placed the oscilloscope probe between Vpri - SW in case there was a small chance I would see a different image, but unfortunately not.

Thermals (For 5 min):



Than i add 220pF snubber capacitor to its place.

NO-LOAD (Except 2Ks) + 220pF 100Ohm Snubber

9.8W + 220pF 100Ohm Snubber

I think, i don't need snubber at all :) What do you think?

Best regards,
Harun

Hi Youhao,

First of all, thank you so much for this great explanation and for your feedback on the snubber. I really appreciate it!

I have just one more question in mind, and I would be grateful if you could clarify it.

When calculating the minimum total power required to be consumed on the secondary sides, the equation P = 1/2 * Ipeak^2 * L * f.

In your message yesterday, you mentioned that "primary peak current will always be 20% or higher of the peak limit (in your circuit it will be 0.8A)." Could you explain how you arrived at this 0.67 * 1.2 = 0.8A value? Did you calculate it using the equation Ipeak = Vin * ton / Lpri?

Thanks again for all your help!

Best regards,
Harun