Tool/software:
Hi all,
1) About the Reference Manual (13.3.6 Manufacturing bit4 (FET_EN))
The default of FET_EN is described as "0," and if this bit is not changed to "1," will both CHG and DSG terminals of BQ28Z610 not work unless the external FET is turned ON with "0"V output?
Do I need to issue command 0x0021 or set flash address 0x43c0 with I2C?
I don't see any description of setting "1" in the datasheet, so I have a question.
2) Writing to Data Memory
Setting values of Charge Voltage, Taper Current, Taper Voltage etc. are written to data memory from CPU of target board using I2C.
1 When rewriting data
ex (bit 4 (ET_EN) of 0x43c0 is set to "1")
First packet AA 3E C0 43
Second packet AA 40 00 01
Third packet AA 60 CS # (CS=check sum (sum of C0,43,00, 01))
Fourth packet AA 61 06
One set of 4 packets is being transmitted.
Do I need a delay or something when I want to set this sequence of addresses?
First data rewrite is successful
Second data packet flows normally
NACK response at 3E of third data
Data including the second data is not rewritten.
After that, if you start over from the beginning
The packet flows normally up to the third data, and at 3E of fourth data, a NACK response is generated.
Data up to the second data is rewritten.
After that, every time you start over, the number of data that can be rewritten increases one by one.
Finally, all writing is completed.
This is a strange behavior.
Try a break after 1 data write operation (after sending packet 06 # 4).
It seems to be able to write reliably if you execute a step after 1 data write operation.
delay: There was no effect even if it was set to about 50 ms.
Could you give me information about writing and reading data memory?
Sorry for the long post.
Best Regards,
Ryusuke
